From: Richard Henderson <richard.henderson@linaro.org>
To: Alexey Baturo <baturo.alexey@gmail.com>
Cc: zhiwei_liu@linux.alibaba.com, palmer@dabbelt.com,
Alistair.Francis@wdc.com, sagark@eecs.berkeley.edu,
kbastian@mail.uni-paderborn.de, qemu-devel@nongnu.org,
qemu-riscv@nongnu.org
Subject: Re: [PATCH v3 4/6] target/riscv: Add pointer masking tb flags
Date: Thu, 4 Jan 2024 09:08:18 +1100 [thread overview]
Message-ID: <47177ca3-e190-42b1-a6c2-d3a2be8cedb6@linaro.org> (raw)
In-Reply-To: <20240103185716.1790546-5-me@deliversmonkey.space>
On 1/4/24 05:57, Alexey Baturo wrote:
> From: Alexey Baturo <baturo.alexey@gmail.com>
>
> Signed-off-by: Alexey Baturo <baturo.alexey@gmail.com>
> ---
> target/riscv/cpu.h | 3 +++
> target/riscv/cpu_helper.c | 3 +++
> target/riscv/translate.c | 11 +++++++++++
> 3 files changed, 17 insertions(+)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index c607a94bba..4df160494f 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -546,6 +546,9 @@ FIELD(TB_FLAGS, ITRIGGER, 20, 1)
> FIELD(TB_FLAGS, VIRT_ENABLED, 21, 1)
> FIELD(TB_FLAGS, PRIV, 22, 2)
> FIELD(TB_FLAGS, AXL, 24, 2)
> +/* If pointer masking should be applied and address sign extended */
> +FIELD(TB_FLAGS, PM_PMM, 26, 2)
> +FIELD(TB_FLAGS, PM_SIGNEXTEND, 28, 1)
>
> #ifdef TARGET_RISCV32
> #define riscv_cpu_mxl(env) ((void)(env), MXL_RV32)
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index 4c34e12ee3..b8d8a622f3 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -68,6 +68,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, vaddr *pc,
> RISCVCPU *cpu = env_archcpu(env);
> RISCVExtStatus fs, vs;
> uint32_t flags = 0;
> + bool pm_signext = !riscv_cpu_bare_mode(env);
>
> *pc = env->xl == MXL_RV32 ? env->pc & UINT32_MAX : env->pc;
> *cs_base = 0;
> @@ -135,6 +136,8 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, vaddr *pc,
> flags = FIELD_DP32(flags, TB_FLAGS, VS, vs);
> flags = FIELD_DP32(flags, TB_FLAGS, XL, env->xl);
> flags = FIELD_DP32(flags, TB_FLAGS, AXL, cpu_address_xl(env));
> + flags = FIELD_DP32(flags, TB_FLAGS, PM_PMM, riscv_pm_get_pmm(env));
> + flags = FIELD_DP32(flags, TB_FLAGS, PM_SIGNEXTEND, pm_signext);
You should avoid setting these fields (i.e. leave them zero) when they won't be used...
> + if (get_xl(ctx) == MXL_RV32) {
> + ctx->addr_width = 32;
> + ctx->addr_signed = false;
... like so.
Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2024-01-03 22:09 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-03 18:57 [PATCH v3 0/6] Pointer Masking update for Zjpm v0.8 Alexey Baturo
2024-01-03 18:57 ` [PATCH v3 1/6] target/riscv: Remove obsolete pointer masking extension code Alexey Baturo
2024-01-05 5:04 ` Alistair Francis
2024-01-05 7:23 ` Alexey Baturo
2024-01-03 18:57 ` [PATCH v3 2/6] target/riscv: Add new CSR fields for S{sn, mn, m}pm extensions as part of Zjpm v0.8 Alexey Baturo
2024-01-03 18:57 ` [PATCH v3 3/6] target/riscv: Add helper functions to calculate current number of masked bits for pointer masking Alexey Baturo
2024-01-05 0:46 ` Deepak Gupta
2024-01-05 7:33 ` Alexey Baturo
2024-01-05 18:13 ` Deepak Gupta
2024-01-03 18:57 ` [PATCH v3 4/6] target/riscv: Add pointer masking tb flags Alexey Baturo
2024-01-03 22:08 ` Richard Henderson [this message]
2024-01-03 18:57 ` [PATCH v3 5/6] target/riscv: Update address modify functions to take into account pointer masking Alexey Baturo
2024-01-03 22:18 ` Richard Henderson
2024-01-05 1:02 ` Deepak Gupta
2024-01-05 7:29 ` Alexey Baturo
2024-01-05 18:07 ` Deepak Gupta
2024-01-03 18:57 ` [PATCH v3 6/6] target/riscv: Enable updates for pointer masking variables and thus enable pointer masking extension Alexey Baturo
2024-01-05 5:27 ` Alistair Francis
2024-01-05 7:23 ` Alexey Baturo
2024-01-08 0:33 ` Alistair Francis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=47177ca3-e190-42b1-a6c2-d3a2be8cedb6@linaro.org \
--to=richard.henderson@linaro.org \
--cc=Alistair.Francis@wdc.com \
--cc=baturo.alexey@gmail.com \
--cc=kbastian@mail.uni-paderborn.de \
--cc=palmer@dabbelt.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=sagark@eecs.berkeley.edu \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).