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Mon, 06 May 2024 02:43:48 -0700 (PDT) Message-ID: <4717eddc-7564-4bb9-8abf-f42c2253e98e@linaro.org> Date: Mon, 6 May 2024 11:43:45 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] hw/char: Add QOM property for STM32L4x5 USART clock frequency From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= To: =?UTF-8?Q?In=C3=A8s_Varhol?= , qemu-devel@nongnu.org, Luc Michel , Damien Hedde Cc: qemu-arm@nongnu.org, Thomas Huth , Arnaud Minier , Laurent Vivier , =?UTF-8?Q?Marc-Andr=C3=A9_Lureau?= , Peter Maydell , Alistair Francis , Samuel Tardieu , Paolo Bonzini , Markus Armbruster , Eduardo Habkost References: <20240505140556.373711-1-ines.varhol@telecom-paris.fr> <20240505140556.373711-4-ines.varhol@telecom-paris.fr> <06e98554-3430-49d5-94f3-c5d683327f55@linaro.org> Content-Language: en-US In-Reply-To: <06e98554-3430-49d5-94f3-c5d683327f55@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org (+Luc & Damien for Clock API) On 6/5/24 11:34, Philippe Mathieu-Daudé wrote: > Hi, > > On 5/5/24 16:05, Inès Varhol wrote: >> Signed-off-by: Inès Varhol >> --- >>   hw/char/stm32l4x5_usart.c | 12 ++++++++++++ >>   1 file changed, 12 insertions(+) >> >> diff --git a/hw/char/stm32l4x5_usart.c b/hw/char/stm32l4x5_usart.c >> index fc5dcac0c4..ee7727481c 100644 >> --- a/hw/char/stm32l4x5_usart.c >> +++ b/hw/char/stm32l4x5_usart.c >> @@ -26,6 +26,7 @@ >>   #include "hw/clock.h" >>   #include "hw/irq.h" >>   #include "hw/qdev-clock.h" >> +#include "qapi/visitor.h" >>   #include "hw/qdev-properties.h" >>   #include "hw/qdev-properties-system.h" >>   #include "hw/registerfields.h" >> @@ -523,6 +524,14 @@ static Property stm32l4x5_usart_base_properties[] >> = { >>       DEFINE_PROP_END_OF_LIST(), >>   }; >> +static void clock_freq_get(Object *obj, Visitor *v, >> +    const char *name, void *opaque, Error **errp) >> +{ >> +    Stm32l4x5UsartBaseState *s = STM32L4X5_USART_BASE(obj); >> +    uint32_t clock_freq_hz = clock_get_hz(s->clk); >> +    visit_type_uint32(v, name, &clock_freq_hz, errp); >> +} >> + >>   static void stm32l4x5_usart_base_init(Object *obj) >>   { >>       Stm32l4x5UsartBaseState *s = STM32L4X5_USART_BASE(obj); >> @@ -534,6 +543,9 @@ static void stm32l4x5_usart_base_init(Object *obj) >>       sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); >>       s->clk = qdev_init_clock_in(DEVICE(s), "clk", NULL, s, 0); >> + >> +    object_property_add(obj, "clock-freq-hz", "uint32", >> +                        clock_freq_get, NULL, NULL, NULL); > > Patch LGTM, but I wonder if registering QOM getter without setter > is recommended. Perhaps we should encourage parity? In normal HW > emulation we shouldn't update this clock externally, but thinking > about testing, this could be interesting to introduce jitter. Orthogonal to this doubt, we could add the clock properties directly in qdev_init_clock_in(). Seems useful for the QTest framework. > Any opinion on this? > >>   } >>   static int stm32l4x5_usart_base_post_load(void *opaque, int version_id) >