From: Robert Reif <reif@earthlink.net>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH] sparc32 fix MXCC error bit clearing
Date: Thu, 15 Nov 2007 18:30:54 -0500 [thread overview]
Message-ID: <473CD6AE.8090309@earthlink.net> (raw)
[-- Attachment #1: Type: text/plain, Size: 38 bytes --]
Fix MXCC error register bit clearing.
[-- Attachment #2: reset1.diff.txt --]
[-- Type: text/plain, Size: 1079 bytes --]
Index: target-sparc/op_helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-sparc/op_helper.c,v
retrieving revision 1.52
diff -p -u -r1.52 op_helper.c
--- target-sparc/op_helper.c 11 Nov 2007 19:46:09 -0000 1.52
+++ target-sparc/op_helper.c 15 Nov 2007 23:28:12 -0000
@@ -438,13 +446,11 @@ void helper_st_asi(int asi, int size)
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size);
break;
case 0x01c00e00: /* MXCC error register */
+ // writing a 1 bit clears the error
if (size == 8)
- env->mxccregs[6] = ((uint64_t)T1 << 32) | T2;
+ env->mxccregs[6] &= ~(((uint64_t)T1 << 32) | T2);
else
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size);
- if (env->mxccregs[6] == 0xffffffffffffffffULL) {
- // this is probably a reset
- }
break;
case 0x01c00f00: /* MBus port address register */
if (size == 8)
next reply other threads:[~2007-11-15 23:30 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-11-15 23:30 Robert Reif [this message]
2007-11-17 9:22 ` [Qemu-devel] [PATCH] sparc32 fix MXCC error bit clearing Blue Swirl
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