From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: Re: [PATCH 5/9] target/riscv: Add mips.ccmov instruction
Date: Fri, 25 Apr 2025 11:24:56 -0700 [thread overview]
Message-ID: <47602bda-16f6-4b3d-9787-08b51c89ccea@linaro.org> (raw)
In-Reply-To: <20250425115912.912889-6-djordje.todorovic@htecgroup.com>
On 4/25/25 05:01, Djordje Todorovic wrote:
> +# Fields
> +%rs3 27:5
> +%rs2 20:5
> +%rs1 15:5
> +%rd 7:5
> +
> +# Argument sets
> +
> +# Formats
> +@r4 ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rd
> +
> +# *** RV64 MIPS Extension ***
> +ccmov .....11 ..... ..... 011 ..... 0001011 @r4
Just write
ccmov rs3:5 11 rs2:5 rs1:5 011 rd:5 0001011
since none of the fields or argument sets are reused.
r~
next prev parent reply other threads:[~2025-04-25 18:25 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-25 12:01 [PATCH 0/9] riscv: Add support for MIPS P8700 CPU Djordje Todorovic
2025-04-25 12:01 ` [PATCH 1/9] hw/intc: Allow gaps in hartids for aclint and aplic Djordje Todorovic
2025-04-25 12:01 ` [PATCH 2/9] target/riscv: Add cpu_set_exception_base Djordje Todorovic
2025-04-25 12:01 ` [PATCH 4/9] target/riscv: Add MIPS P8700 CSRs Djordje Todorovic
2025-04-25 12:01 ` [PATCH 3/9] target/riscv: Add MIPS P8700 CPU Djordje Todorovic
2025-04-25 12:01 ` [PATCH 5/9] target/riscv: Add mips.ccmov instruction Djordje Todorovic
2025-04-25 18:24 ` Richard Henderson [this message]
2025-04-25 12:01 ` [PATCH 8/9] configs/devices: Add MIPS Boston-aia board model to RISC-V Djordje Todorovic
2025-04-25 12:01 ` [PATCH 6/9] target/riscv: Add mips.pref instruction Djordje Todorovic
2025-04-25 12:01 ` [PATCH 7/9] target/riscv: Add Xmipslsp instructions Djordje Todorovic
2025-04-25 12:01 ` [PATCH 9/9] hw/riscv: Add a network device e1000e to the boston-aia Djordje Todorovic
2025-04-29 4:40 ` Joel Stanley
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