From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1J3mhF-0005YY-6J for qemu-devel@nongnu.org; Sun, 16 Dec 2007 01:09:53 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1J3mhC-0005Vn-M5 for qemu-devel@nongnu.org; Sun, 16 Dec 2007 01:09:51 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1J3mhC-0005VM-Bc for qemu-devel@nongnu.org; Sun, 16 Dec 2007 01:09:50 -0500 Received: from mx20.gnu.org ([199.232.41.8]) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1J3kRc-0008WK-Ly for qemu-devel@nongnu.org; Sat, 15 Dec 2007 22:45:37 -0500 Received: from gateway-1237.mvista.com ([63.81.120.158]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1J3MZM-0007A3-9A for qemu-devel@nongnu.org; Fri, 14 Dec 2007 21:16:01 -0500 Received: from pahoa.hi.kama-aina.net (unknown [10.235.20.2]) by hermes.mvista.com (Postfix) with ESMTP id DC4651EDA2 for ; Fri, 14 Dec 2007 17:45:56 -0800 (PST) Message-ID: <476331D4.3010602@kama-aina.net> Date: Fri, 14 Dec 2007 15:45:56 -1000 From: Armin MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------000000020304030706020708" Subject: [Qemu-devel] [Patch 2/2] switch support, Mainstone Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This is a multi-part message in MIME format. --------------000000020304030706020708 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Here is the use of the switches patch on a Mainstone. -Armin --------------000000020304030706020708 Content-Type: text/x-patch; name="mst_switches.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="mst_switches.patch" Index: qemu/hw/mainstone.c =================================================================== --- qemu.orig/hw/mainstone.c +++ qemu/hw/mainstone.c @@ -51,32 +51,28 @@ static void mainstone_common_init(int ra /* There are two 32MiB flash devices on the board */ index = drive_get_index(IF_PFLASH, 0, 0); if (index == -1) { - fprintf(stderr, "Two flash images must be given with the " + fprintf(stderr, "One flash image must be given with the " "'pflash' parameter\n"); exit(1); } - if (!pflash_cfi01_register(MST_FLASH_0, - mainstone_ram + PXA2XX_INTERNAL_SIZE, - drives_table[index].bdrv, - 256 * 1024, 128, 4, 0, 0, 0, 0)) { - fprintf(stderr, "qemu: Error registering flash memory.\n"); - exit(1); - } - index = drive_get_index(IF_PFLASH, 0, 1); - if (index == -1) { - fprintf(stderr, "Two flash images must be given with the " - "'pflash' parameter\n"); - exit(1); - } - if (!pflash_cfi01_register(MST_FLASH_1, - mainstone_ram + PXA2XX_INTERNAL_SIZE, - drives_table[index].bdrv, - 256 * 1024, 128, 4, 0, 0, 0, 0)) { - fprintf(stderr, "qemu: Error registering flash memory.\n"); - exit(1); + if(switch_get_value(CFG_SPDT_SWITCH, 7)) { + if (!pflash_cfi01_register(MST_FLASH_0, + mainstone_ram + PXA2XX_INTERNAL_SIZE, + drives_table[index].bdrv, + 256 * 1024, 128, 4, 0, 0, 0, 0)) { + fprintf(stderr, "qemu: Error registering flash memory.\n"); + exit(1); + } + }else{ + if (!pflash_cfi01_register(MST_FLASH_1, + mainstone_ram + PXA2XX_INTERNAL_SIZE, + drives_table[index].bdrv, + 256 * 1024, 128, 4, 0, 0, 0, 0)) { + fprintf(stderr, "qemu: Error registering flash memory.\n"); + exit(1); + } } - mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0); /* MMC/SD host */ --------------000000020304030706020708--