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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id b13-20020a63eb4d000000b005dc9439c56bsm12397324pgk.13.2024.02.23.10.19.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 23 Feb 2024 10:19:59 -0800 (PST) Message-ID: <47974032-2c22-481c-a9e1-1fc5990340d6@linaro.org> Date: Fri, 23 Feb 2024 08:19:55 -1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] arm/ptw: Handle atomic updates of page tables entries in MMIO during PTW. To: Jonathan Cameron , qemu-devel@nongnu.org, Peter Maydell , Gregory Price , =?UTF-8?Q?Alex_Benn=C3=A9e?= Cc: linux-cxl@vger.kernel.org, linuxarm@huawei.com References: <20240223180102.7657-1-Jonathan.Cameron@huawei.com> Content-Language: en-US From: Richard Henderson In-Reply-To: <20240223180102.7657-1-Jonathan.Cameron@huawei.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::22a; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 2/23/24 08:01, Jonathan Cameron wrote: > Seen testing of CXL emulation on arm64 (currently out of tree). > > CXL interleave occurs at subpage granularity so is emulated using an IO > Memory Region. The memory is general purpose and as such may contain page > tables. FEAT_HADFS using atomic accesses from the page table walkers to > update accessed and dirty bits. > > Note that disabling kernel support this ARM 8.1 feature avoids this issue > as the PTW no longer does an atomic update of the page table entries, but > that is a nasty workaround beyond its use in root causing this issue. > > Signed-off-by: Jonathan Cameron > --- Reviewed-by: Richard Henderson r~