From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JSz3B-0005U5-8n for qemu-devel@nongnu.org; Sat, 23 Feb 2008 13:24:41 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JSz3A-0005Tq-Fw for qemu-devel@nongnu.org; Sat, 23 Feb 2008 13:24:40 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JSz3A-0005Tn-CB for qemu-devel@nongnu.org; Sat, 23 Feb 2008 13:24:40 -0500 Received: from relay2-v.mail.gandi.net ([217.70.178.76]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1JSz3A-0006yd-5t for qemu-devel@nongnu.org; Sat, 23 Feb 2008 13:24:40 -0500 Message-ID: <47C064B5.4040809@bellard.org> Date: Sat, 23 Feb 2008 19:23:49 +0100 From: Fabrice Bellard MIME-Version: 1.0 References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [PATCH, RFC, WIP] TCG for Qemu target Sparc32/64 Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl Blue Swirl wrote: > The attached patch enables most TCG ops for Qemu Sparc32/64 target. > Sparc32 softmmu and linux-user are OK, but Sparc64 and Sparc32plus > targets do not work. > > Comments? > > It would be nice to get rid of T2 usage in std (also stda and > casa/casxa) but I don't know how to pass a 64-bit value from legacy op > to TCG stores and loads on a 32-bit target and host. [...] Also don't forget that T2 is used in CPU restore state to handle delay slots. This part of the SPARC target is tricky and should be simplified. Another point is that you should define TCG globals for each SPARC GPR. It was not done for i386 because I feared performance regressions when accessing to 16 bit or 8 bit sub-registers. On SPARC you do not have this issue. Regarding the generic "xxx_tl" defines, I did not move it into TCG because I wanted TCG to be target independent. Since it is no longer the case because of the target memory access instructions, I think it is a good idea now. But do not mix the target specific defines with target independent defines (in tcg-op.h there is a specific section for target specific defines). Regards, Fabrice.