From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JZVYD-00031c-R3 for qemu-devel@nongnu.org; Wed, 12 Mar 2008 14:19:41 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JZVYC-00030Q-Sx for qemu-devel@nongnu.org; Wed, 12 Mar 2008 14:19:41 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JZVYC-00030H-Oj for qemu-devel@nongnu.org; Wed, 12 Mar 2008 14:19:40 -0400 Received: from mail.windriver.com ([147.11.1.11] helo=mail.wrs.com) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1JZVYC-0001yA-Mn for qemu-devel@nongnu.org; Wed, 12 Mar 2008 14:19:40 -0400 Message-ID: <47D81E95.7080304@windriver.com> Date: Wed, 12 Mar 2008 13:19:01 -0500 From: Jason Wessel MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH] implement sysrq for the pl011 Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: paul@codesourcery.com Implement sysrq for the pl011. This was tested on the ARM Versatile AB + kernel.org 2.6.X kernel. Signed-off-by: Jason Wessel --- hw/pl011.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) --- a/hw/pl011.c +++ b/hw/pl011.c @@ -208,7 +208,24 @@ static void pl011_receive(void *opaque, static void pl011_event(void *opaque, int event) { - /* ??? Should probably implement break. */ + if (event == CHR_EVENT_BREAK) { + pl011_state *s = (pl011_state *)opaque; + int slot; + + slot = s->read_pos + s->read_count; + if (slot >= 16) + slot -= 16; + s->read_fifo[slot] = 0x400; + s->read_count++; + s->flags &= ~PL011_FLAG_RXFE; + if (s->cr & 0x10 || s->read_count == 16) { + s->flags |= PL011_FLAG_RXFF; + } + if (s->read_count == s->read_trigger) { + s->int_level |= PL011_INT_RX; + pl011_update(s); + } + } } static CPUReadMemoryFunc *pl011_readfn[] = {