From: "Hervé Poussineau" <hpoussin@reactos.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH] [MIPS] Fix infinite loop when invalidating TLB
Date: Sat, 29 Mar 2008 19:24:47 +0100 [thread overview]
Message-ID: <47EE896F.3030906@reactos.org> (raw)
[-- Attachment #1: Type: text/plain, Size: 257 bytes --]
Hi,
In certain conditions, MIPS R4K TLB invalidation can lead to an infinite
loop.
If 'end' address is 0xffffffffffffffff, invalidation loop should stop
once 'addr' has flushed address 0xfffffffffffff000.
Attached patch fixes this issue.
Hervé
[-- Attachment #2: invalidate_last_page.patch --]
[-- Type: text/plain, Size: 539 bytes --]
Index: target-mips/helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-mips/helper.c,v
retrieving revision 1.63
diff -u -r1.63 target-mips/helper.c
--- target-mips/helper.c 4 Jan 2008 17:52:57 -0000 1.63
+++ target-mips/helper.c 28 Mar 2008 07:47:46 -0000
@@ -630,7 +630,7 @@
}
#endif
end = addr | mask;
- while (addr < end) {
+ while (addr - 1 < end) {
tlb_flush_page (env, addr);
addr += TARGET_PAGE_SIZE;
}
reply other threads:[~2008-03-29 18:25 UTC|newest]
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