From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Mohamed Mediouni <mohamed@unpredictable.fr>, qemu-devel@nongnu.org
Cc: "Shannon Zhao" <shannon.zhaosl@gmail.com>,
"Ani Sinha" <anisinha@redhat.com>,
"Phil Dennis-Jordan" <phil@philjordan.eu>,
"Roman Bolshakov" <rbolshakov@ddn.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Mads Ynddal" <mads@ynddal.dk>,
"Daniel P. Berrangé" <berrange@redhat.com>,
"Sunil Muthuswamy" <sunilmut@microsoft.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Alexander Graf" <agraf@csgraf.de>,
qemu-arm@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Cameron Esfahani" <dirty@apple.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>
Subject: Re: [PATCH v4 09/17] whpx: add arm64 support
Date: Tue, 5 Aug 2025 00:56:05 +0200 [thread overview]
Message-ID: <47ba48ae-e3d6-47a0-9aa4-35c0a14d7c9f@linaro.org> (raw)
In-Reply-To: <20250804142326.72947-10-mohamed@unpredictable.fr>
On 4/8/25 16:23, Mohamed Mediouni wrote:
> Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
> ---
> accel/whpx/whpx-common.c | 1 +
> meson.build | 21 +-
> target/arm/meson.build | 1 +
> target/arm/whpx/meson.build | 3 +
> target/arm/whpx/whpx-all.c | 845 ++++++++++++++++++++++++++++++++++++
> 5 files changed, 864 insertions(+), 7 deletions(-)
> create mode 100644 target/arm/whpx/meson.build
> create mode 100644 target/arm/whpx/whpx-all.c
> +int whpx_init_vcpu(CPUState *cpu)
> +{
> + HRESULT hr;
> + struct whpx_state *whpx = &whpx_global;
> + AccelCPUState *vcpu = NULL;
> + ARMCPU *arm_cpu = ARM_CPU(cpu);
> + CPUARMState *env = &arm_cpu->env;
> + int ret;
> +
> + uint32_t sregs_match_len = ARRAY_SIZE(whpx_sreg_match);
> + uint32_t sregs_cnt = 0;
> + WHV_REGISTER_VALUE val;
> + int i;
> +
> + vcpu = g_new0(AccelCPUState, 1);
> +
> + hr = whp_dispatch.WHvCreateVirtualProcessor(
> + whpx->partition, cpu->cpu_index, 0);
> + if (FAILED(hr)) {
> + error_report("WHPX: Failed to create a virtual processor,"
> + " hr=%08lx", hr);
> + ret = -EINVAL;
> + goto error;
> + }
> +
> + /* Assumption that CNTFRQ_EL0 is the same between the VMM and the partition. */
> + asm volatile("mrs %0, cntfrq_el0" : "=r"(arm_cpu->gt_cntfrq_hz));
> +
> + cpu->vcpu_dirty = true;
> + cpu->accel = vcpu;
> + max_vcpu_index = max(max_vcpu_index, cpu->cpu_index);
> + qemu_add_vm_change_state_handler(whpx_cpu_update_state, env);
> +
> + env->aarch64 = true;
> +
> + /* Allocate enough space for our sysreg sync */
> + arm_cpu->cpreg_indexes = g_renew(uint64_t, arm_cpu->cpreg_indexes,
> + sregs_match_len);
> + arm_cpu->cpreg_values = g_renew(uint64_t, arm_cpu->cpreg_values,
> + sregs_match_len);
> + arm_cpu->cpreg_vmstate_indexes = g_renew(uint64_t,
> + arm_cpu->cpreg_vmstate_indexes,
> + sregs_match_len);
> + arm_cpu->cpreg_vmstate_values = g_renew(uint64_t,
> + arm_cpu->cpreg_vmstate_values,
> + sregs_match_len);
> +
> + memset(arm_cpu->cpreg_values, 0, sregs_match_len * sizeof(uint64_t));
> +
> + /* Populate cp list for all known sysregs */
> + for (i = 0; i < sregs_match_len; i++) {
> + const ARMCPRegInfo *ri;
> + uint32_t key = whpx_sreg_match[i].key;
> +
> + ri = get_arm_cp_reginfo(arm_cpu->cp_regs, key);
> + if (ri) {
> + assert(!(ri->type & ARM_CP_NO_RAW));
> + whpx_sreg_match[i].cp_idx = sregs_cnt;
> + arm_cpu->cpreg_indexes[sregs_cnt++] = cpreg_to_kvm_id(key);
> + } else {
> + whpx_sreg_match[i].cp_idx = -1;
> + }
> + }
> + arm_cpu->cpreg_array_len = sregs_cnt;
> + arm_cpu->cpreg_vmstate_array_len = sregs_cnt;
> +
> + assert(write_cpustate_to_list(arm_cpu, false));
> +
> + /* Set CP_NO_RAW system registers on init */
> + val.Reg64 = arm_cpu->midr;
> + whpx_set_reg(cpu, WHvArm64RegisterMidrEl1,
> + val);
> +
> + clean_whv_register_value(&val);
> +
> + /* bit 31 of MPIDR_EL1 is RES1, and this is enforced by WHPX */
> + val.Reg64 = 0x80000000 + arm_cpu->mp_affinity;
Preferably:
val.Reg64 = deposit64(arm_cpu->mp_affinity, 31, 1, 1 /* RES1 */);
> + whpx_set_reg(cpu, WHvArm64RegisterMpidrEl1,
> + val);
(note, your indentation is often off)
> +
> + return 0;
> +
> +error:
> + g_free(vcpu);
> +
> + return ret;
> +
> +}
next prev parent reply other threads:[~2025-08-04 22:57 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-04 14:23 [PATCH v4 00/17] WHPX support for Arm Mohamed Mediouni
2025-08-04 14:23 ` [PATCH v4 01/17] accel/system: Introduce hwaccel_enabled() helper Mohamed Mediouni
2025-08-04 16:00 ` Claudio Fontana
2025-08-04 16:12 ` Mohamed Mediouni
2025-08-04 18:58 ` Philippe Mathieu-Daudé
2025-08-04 14:23 ` [PATCH v4 02/17] hw/arm: virt: add GICv2m for the case when ITS is not available Mohamed Mediouni
2025-08-04 19:25 ` Pierrick Bouvier
2025-08-04 14:23 ` [PATCH v4 03/17] whpx: Move around files before introducing AArch64 support Mohamed Mediouni
2025-08-04 19:38 ` Pierrick Bouvier
2025-08-04 14:23 ` [PATCH v4 04/17] whpx: reshuffle common code Mohamed Mediouni
2025-08-04 19:41 ` Pierrick Bouvier
2025-08-04 14:23 ` [PATCH v4 05/17] whpx: ifdef out winhvemulation on non-x86_64 Mohamed Mediouni
2025-08-04 19:44 ` Pierrick Bouvier
2025-08-04 14:23 ` [PATCH v4 06/17] whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define Mohamed Mediouni
2025-08-04 19:45 ` Pierrick Bouvier
2025-08-04 14:23 ` [PATCH v4 07/17] hw, target, accel: whpx: change apic_in_platform to kernel_irqchip Mohamed Mediouni
2025-08-04 19:48 ` Pierrick Bouvier
2025-08-04 14:23 ` [PATCH v4 08/17] whpx: interrupt controller support Mohamed Mediouni
2025-08-04 21:39 ` Pierrick Bouvier
2025-08-04 21:47 ` Mohamed Mediouni
2025-08-04 21:48 ` Pierrick Bouvier
2025-08-04 21:49 ` Pierrick Bouvier
2025-08-04 14:23 ` [PATCH v4 09/17] whpx: add arm64 support Mohamed Mediouni
2025-08-04 21:59 ` Pierrick Bouvier
2025-08-04 22:08 ` Mohamed Mediouni
2025-08-04 22:16 ` Pierrick Bouvier
2025-08-04 22:15 ` Pierrick Bouvier
2025-08-04 22:56 ` Philippe Mathieu-Daudé [this message]
2025-08-04 14:23 ` [PATCH v4 10/17] whpx: copy over memory management logic from hvf Mohamed Mediouni
2025-08-04 21:14 ` Pierrick Bouvier
2025-08-04 22:56 ` Philippe Mathieu-Daudé
2025-08-04 23:02 ` Pierrick Bouvier
2025-08-04 14:23 ` [PATCH v4 11/17] target/arm: cpu: mark WHPX as supporting PSCI 1.1 Mohamed Mediouni
2025-08-04 19:48 ` Pierrick Bouvier
2025-08-04 14:23 ` [PATCH v4 12/17] hw/arm: virt: cleanly fail on attempt to use the platform vGIC together with ITS Mohamed Mediouni
2025-08-04 19:50 ` Pierrick Bouvier
2025-08-04 19:56 ` Mohamed Mediouni
2025-08-04 20:40 ` Pierrick Bouvier
2025-08-04 20:59 ` Mohamed Mediouni
2025-08-04 21:22 ` Pierrick Bouvier
2025-08-04 22:59 ` Philippe Mathieu-Daudé
2025-08-04 23:52 ` Mohamed Mediouni
2025-08-04 14:23 ` [PATCH v4 13/17] whpx: arm64: clamp down IPA size Mohamed Mediouni
2025-08-04 20:46 ` Pierrick Bouvier
2025-08-04 14:23 ` [PATCH v4 14/17] hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX and HVF Mohamed Mediouni
2025-08-04 20:58 ` Pierrick Bouvier
2025-08-04 23:03 ` Philippe Mathieu-Daudé
2025-08-04 23:10 ` Pierrick Bouvier
2025-08-04 23:13 ` Richard Henderson
2025-08-04 23:41 ` Mohamed Mediouni
2025-08-05 0:27 ` Mohamed Mediouni
2025-08-04 14:23 ` [PATCH v4 15/17] whpx: arm64: implement -cpu host Mohamed Mediouni
2025-08-04 21:27 ` Pierrick Bouvier
2025-08-04 21:49 ` Mohamed Mediouni
2025-08-04 22:00 ` Pierrick Bouvier
2025-08-04 14:23 ` [PATCH v4 16/17] target/arm: whpx: instantiate GIC early Mohamed Mediouni
2025-08-04 19:52 ` Pierrick Bouvier
2025-08-04 14:23 ` [PATCH v4 17/17] MAINTAINERS: Add myself as a maintainer for WHPX Mohamed Mediouni
2025-08-04 19:52 ` Pierrick Bouvier
2025-08-04 18:51 ` [PATCH v4 00/17] WHPX support for Arm Pierrick Bouvier
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