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[213.106.181.179]) by smtp.gmail.com with ESMTPSA id v22-20020a7bcb56000000b003fbb5506e54sm7175795wmj.29.2023.07.23.02.34.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 23 Jul 2023 02:34:17 -0700 (PDT) Message-ID: <47c6ff2d-85c4-4e44-a381-1e48e7aec7e0@linaro.org> Date: Sun, 23 Jul 2023 10:34:16 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH 02/14] target/arm/ptw: Don't report GPC faults on stage 1 ptw as stage2 faults Content-Language: en-US To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20230714154648.327466-1-peter.maydell@linaro.org> <20230714154648.327466-3-peter.maydell@linaro.org> From: Richard Henderson In-Reply-To: <20230714154648.327466-3-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.091, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 7/14/23 16:46, Peter Maydell wrote: > In S1_ptw_translate() we set up the ARMMMUFaultInfo if the attempt to > translate the page descriptor address into a physical address fails. > This used to only be possible if we are doing a stage 2 ptw for that > descriptor address, and so the code always sets fi->stage2 and > fi->s1ptw to true. However, with FEAT_RME it is also possible for > the lookup of the page descriptor address to fail because of a > Granule Protection Check fault. These should not be reported as > stage 2, otherwise arm_deliver_fault() will incorrectly set > HPFAR_EL2. Similarly the s1ptw bit should only be set for stage 2 > faults on stage 1 translation table walks, i.e. not for GPC faults. > > Add a comment to the the other place where we might detect a > stage2-fault-on-stage-1-ptw, in arm_casq_ptw(), noting why we know in > that case that it must really be a stage 2 fault and not a GPC fault. > > Signed-off-by: Peter Maydell > --- > target/arm/ptw.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson r~