From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Sairaj Kodilkar <sarunkod@amd.com>,
Ethan MILON <ethan.milon@eviden.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Eduardo Habkost <eduardo@habkost.net>
Subject: [PULL 09/17] hw/i386/amd_iommu: Fix amdvi_write*()
Date: Fri, 1 Aug 2025 10:25:21 -0400 [thread overview]
Message-ID: <47d3b32d6fb1c6ec8afb78d12d2420dbbb4c3499.1754058276.git.mst@redhat.com> (raw)
In-Reply-To: <cover.1754058276.git.mst@redhat.com>
From: Sairaj Kodilkar <sarunkod@amd.com>
amdvi_write*() function do not preserve the older values of W1C bits in
the MMIO register. This results in all W1C bits set to 0, when guest
tries to reset a single bit by writing 1 to it. Fix this by preserving
W1C bits in the old value of the MMIO register.
Fixes: d29a09ca68428 ("hw/i386: Introduce AMD IOMMU")
Suggested-by: Ethan MILON <ethan.milon@eviden.com>
Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
Message-Id: <20250801060507.3382-5-sarunkod@amd.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/i386/amd_iommu.c | 21 ++++++++++++++++++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
index 7308611bf1..c9c32cf7b0 100644
--- a/hw/i386/amd_iommu.c
+++ b/hw/i386/amd_iommu.c
@@ -123,8 +123,13 @@ static void amdvi_writew(AMDVIState *s, hwaddr addr, uint16_t val)
uint16_t romask = lduw_le_p(&s->romask[addr]);
uint16_t w1cmask = lduw_le_p(&s->w1cmask[addr]);
uint16_t oldval = lduw_le_p(&s->mmior[addr]);
+
+ uint16_t oldval_preserved = oldval & (romask | w1cmask);
+ uint16_t newval_write = val & ~romask;
+ uint16_t newval_w1c_set = val & w1cmask;
+
stw_le_p(&s->mmior[addr],
- ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask));
+ (oldval_preserved | newval_write) & ~newval_w1c_set);
}
static void amdvi_writel(AMDVIState *s, hwaddr addr, uint32_t val)
@@ -132,8 +137,13 @@ static void amdvi_writel(AMDVIState *s, hwaddr addr, uint32_t val)
uint32_t romask = ldl_le_p(&s->romask[addr]);
uint32_t w1cmask = ldl_le_p(&s->w1cmask[addr]);
uint32_t oldval = ldl_le_p(&s->mmior[addr]);
+
+ uint32_t oldval_preserved = oldval & (romask | w1cmask);
+ uint32_t newval_write = val & ~romask;
+ uint32_t newval_w1c_set = val & w1cmask;
+
stl_le_p(&s->mmior[addr],
- ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask));
+ (oldval_preserved | newval_write) & ~newval_w1c_set);
}
static void amdvi_writeq(AMDVIState *s, hwaddr addr, uint64_t val)
@@ -141,8 +151,13 @@ static void amdvi_writeq(AMDVIState *s, hwaddr addr, uint64_t val)
uint64_t romask = ldq_le_p(&s->romask[addr]);
uint64_t w1cmask = ldq_le_p(&s->w1cmask[addr]);
uint64_t oldval = ldq_le_p(&s->mmior[addr]);
+
+ uint64_t oldval_preserved = oldval & (romask | w1cmask);
+ uint64_t newval_write = val & ~romask;
+ uint64_t newval_w1c_set = val & w1cmask;
+
stq_le_p(&s->mmior[addr],
- ((oldval & romask) | (val & ~romask)) & ~(val & w1cmask));
+ (oldval_preserved | newval_write) & ~newval_w1c_set);
}
/* OR a 64-bit register with a 64-bit value */
--
MST
next prev parent reply other threads:[~2025-08-01 14:37 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-01 14:24 [PULL 00/17] virtio,pci,pc: bugfixes Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 01/17] virtio: fix off-by-one and invalid access in virtqueue_ordered_fill Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 02/17] vhost: Do not abort on log-start error Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 03/17] vhost: Do not abort on log-stop error Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 04/17] virtio-net: Fix VLAN filter table reset timing Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 05/17] pcie_sriov: Fix configuration and state synchronization Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 06/17] hw/i386/amd_iommu: Fix MMIO register write tracing Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 07/17] hw/i386/amd_iommu: Remove unused and wrongly set ats_enabled field Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 08/17] hw/i386/amd_iommu: Move IOAPIC memory region initialization to the end Michael S. Tsirkin
2025-08-01 14:25 ` Michael S. Tsirkin [this message]
2025-08-01 14:25 ` [PULL 10/17] hw/i386/amd_iommu: Support MMIO writes to the status register Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 11/17] hw/i386/amd_iommu: Fix event log generation Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 12/17] tests/acpi: virt: add an empty HEST file Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 13/17] tests/qtest/bios-tables-test: extend to also check HEST table Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 14/17] tests/acpi: virt: update HEST file with its current data Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 15/17] intel_iommu: Allow both Status Write and Interrupt Flag in QI wait Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 16/17] MAINTAINERS: add net/vhost* files under `vhost` Michael S. Tsirkin
2025-08-01 14:25 ` [PULL 17/17] net/vdpa: fix potential fd leak in net_init_vhost_vdpa() Michael S. Tsirkin
2025-08-01 19:34 ` [PULL 00/17] virtio,pci,pc: bugfixes Stefan Hajnoczi
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