From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JmDiB-0000dF-U4 for qemu-devel@nongnu.org; Wed, 16 Apr 2008 15:54:31 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JmDiA-0000d1-Fm for qemu-devel@nongnu.org; Wed, 16 Apr 2008 15:54:31 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JmDiA-0000cy-C4 for qemu-devel@nongnu.org; Wed, 16 Apr 2008 15:54:30 -0400 Received: from e6.ny.us.ibm.com ([32.97.182.146]) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1JmDi9-0004sN-PY for qemu-devel@nongnu.org; Wed, 16 Apr 2008 15:54:30 -0400 Received: from d01relay02.pok.ibm.com (d01relay02.pok.ibm.com [9.56.227.234]) by e6.ny.us.ibm.com (8.13.8/8.13.8) with ESMTP id m3GJuWxF019959 for ; Wed, 16 Apr 2008 15:56:32 -0400 Received: from d01av04.pok.ibm.com (d01av04.pok.ibm.com [9.56.224.64]) by d01relay02.pok.ibm.com (8.13.8/8.13.8/NCO v8.7) with ESMTP id m3GJsQiO227518 for ; Wed, 16 Apr 2008 15:54:26 -0400 Received: from d01av04.pok.ibm.com (loopback [127.0.0.1]) by d01av04.pok.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id m3GJsQxQ007429 for ; Wed, 16 Apr 2008 15:54:26 -0400 Message-ID: <4806596C.4090107@us.ibm.com> Date: Wed, 16 Apr 2008 14:54:20 -0500 From: Anthony Liguori MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH 1/5] PCI DMA API (v3) References: <1208297491-1287-1-git-send-email-aliguori@us.ibm.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: kvm-devel@lists.sourceforge.net, Marcelo Tosatti , qemu-devel@nongnu.org, Aurelien Jarno , Paul Brook Blue Swirl wrote: > On 4/16/08, Anthony Liguori wrote: > >> This patch introduces a DMA API and plumbs support through the DMA layer. We >> use a mostly opaque structure, IOVector to represent a scatter/gather list of >> physical memory. Associated with each IOVector is a read/write function and >> an opaque pointer. This allows arbitrary transformation/mapping of the >> data while providing an easy mechanism to short-cut the zero-copy case >> in the block/net backends. >> > > This looks much better also for Sparc uses. I converted pcnet to use > the IOVectors (see patch), it does not work yet but looks doable. > Excellent! > IMHO the read/write functions should be a property of the bus so that > they are hidden from the device, for pcnet it does not matter as we > have to do the swapping anyway. > For an IOMMU that has a per-device mapping, the read/write functions have to operate on a per-device basis. Regards, Anthony Liguori