From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JsvwC-0007eJ-SF for qemu-devel@nongnu.org; Mon, 05 May 2008 04:20:44 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JsvwC-0007e3-6c for qemu-devel@nongnu.org; Mon, 05 May 2008 04:20:44 -0400 Received: from [199.232.76.173] (port=45740 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JsvwC-0007e0-2g for qemu-devel@nongnu.org; Mon, 05 May 2008 04:20:44 -0400 Received: from gecko.sbs.de ([194.138.37.40]) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1JsvwB-0005oe-J1 for qemu-devel@nongnu.org; Mon, 05 May 2008 04:20:43 -0400 Received: from mail2.sbs.de (localhost [127.0.0.1]) by gecko.sbs.de (8.12.11.20060308/8.12.11) with ESMTP id m458KetU025255 for ; Mon, 5 May 2008 10:20:40 +0200 Received: from [139.25.109.167] (mchn012c.mchp.siemens.de [139.25.109.167] (may be forged)) by mail2.sbs.de (8.12.11.20060308/8.12.11) with ESMTP id m458Kegq020666 for ; Mon, 5 May 2008 10:20:40 +0200 Message-ID: <481EC357.9030401@siemens.com> Date: Mon, 05 May 2008 10:20:39 +0200 From: Jan Kiszka MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH] ide: Enable byte&word access to DMA address register Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org According to the specs, also byte- and word-wise access to the busmaster DMA address register is allowed. Patch below fixes the IDE emulation in this regard (avoiding to touch the existing common case of 32-bit access) and makes our guest happy. Signed-off-by: Jan Kiszka --- hw/ide.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) Index: b/hw/ide.c =================================================================== --- a/hw/ide.c +++ b/hw/ide.c @@ -2838,6 +2838,29 @@ static void bmdma_writeb(void *opaque, u } } +static uint32_t bmdma_addr_readb(void *opaque, uint32_t addr) +{ + BMDMAState *bm = opaque; + uint32_t val; + val = (bm->addr >> ((addr & 3) * 8)) & 0xff; +#ifdef DEBUG_IDE + printf("%s: 0x%08x\n", __func__, val); +#endif + return val; +} + +static void bmdma_addr_writeb(void *opaque, uint32_t addr, uint32_t val) +{ + BMDMAState *bm = opaque; + int shift = (addr & 3) * 8; +#ifdef DEBUG_IDE + printf("%s: 0x%08x\n", __func__, val); +#endif + bm->addr &= ~(0xFF << shift); + bm->addr |= (val & 0xfc) << shift; + bm->cur_addr = bm->addr; +} + static uint32_t bmdma_addr_readl(void *opaque, uint32_t addr) { BMDMAState *bm = opaque; @@ -2876,6 +2899,8 @@ static void bmdma_map(PCIDevice *pci_dev register_ioport_write(addr + 1, 3, 1, bmdma_writeb, bm); register_ioport_read(addr, 4, 1, bmdma_readb, bm); + register_ioport_write(addr + 4, 4, 1, bmdma_addr_writeb, bm); + register_ioport_read(addr + 4, 4, 1, bmdma_addr_readb, bm); register_ioport_write(addr + 4, 4, 4, bmdma_addr_writel, bm); register_ioport_read(addr + 4, 4, 4, bmdma_addr_readl, bm); addr += 8; -- Siemens AG, Corporate Technology, CT SE 2 Corporate Competence Center Embedded Linux