From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1K11Gs-0002tN-0r for qemu-devel@nongnu.org; Tue, 27 May 2008 11:39:30 -0400 Received: from [199.232.76.173] (port=60842 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1K11Gr-0002sz-83 for qemu-devel@nongnu.org; Tue, 27 May 2008 11:39:29 -0400 Received: from mx1.polytechnique.org ([129.104.30.34]:57996) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1K11Gr-0001sJ-67 for qemu-devel@nongnu.org; Tue, 27 May 2008 11:39:29 -0400 Received: from fbe1.dev.netgem.com (gw.netgem.com [195.68.2.34]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ssl.polytechnique.org (Postfix) with ESMTP id 52B9D33177 for ; Tue, 27 May 2008 17:39:25 +0200 (CEST) Message-ID: <483C2B28.1050907@bellard.org> Date: Tue, 27 May 2008 17:39:20 +0200 From: Fabrice Bellard MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH 2/6] Push common interrupt variables to cpu-defs.h References: <1211901505-30519-1-git-send-email-gcosta@redhat.com> <1211901505-30519-2-git-send-email-gcosta@redhat.com> <1211901505-30519-3-git-send-email-gcosta@redhat.com> In-Reply-To: <1211901505-30519-3-git-send-email-gcosta@redhat.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Glauber Costa wrote: > Some interrupt-related attributes, which includes the jmp_buf, > are present in all, or almost all, architectures. So move them > to common code in cpu-defs.h instead of replicating them everywhere OK for jmp_buf and exception_index, but not for error_code as it is CPU specific (it is present on other CPUs because the authors choose to use the same naming as on x86). Fabrice.