From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1K3A3A-0003ob-7O for qemu-devel@nongnu.org; Mon, 02 Jun 2008 09:26:12 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1K3A39-0003oK-Rx for qemu-devel@nongnu.org; Mon, 02 Jun 2008 09:26:11 -0400 Received: from [199.232.76.173] (port=56636 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1K3A39-0003oD-G3 for qemu-devel@nongnu.org; Mon, 02 Jun 2008 09:26:11 -0400 Received: from an-out-0708.google.com ([209.85.132.246]:31467) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1K3A39-000588-8v for qemu-devel@nongnu.org; Mon, 02 Jun 2008 09:26:11 -0400 Received: by an-out-0708.google.com with SMTP id d18so442299and.130 for ; Mon, 02 Jun 2008 06:26:10 -0700 (PDT) Message-ID: <4843F4E6.1090003@codemonkey.ws> Date: Mon, 02 Jun 2008 08:25:58 -0500 From: Anthony Liguori MIME-Version: 1.0 Subject: Re: [Qemu-devel] Re: KQEMU code organization References: <483C3D55.2000508@siemens.com> <483C8705.307@bellard.org> <483D81FA.5070202@siemens.com> <483D8A2E.5070907@bellard.org> <483D8E9A.40509@siemens.com> <483EA1AD.1010901@bellard.org> <20080529161322.GB21610@shareable.org> <483ED935.2060802@codemonkey.ws> <483F25A2.1090108@bellard.org> <4843299D.6050902@codemonkey.ws> <4843B711.7090304@bellard.org> In-Reply-To: <4843B711.7090304@bellard.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Fabrice Bellard wrote: >> This is for device emulation. KVM doesn't use l1_phys_map() for >> things like shadow page table accesses. >> >> In the device emulation, we're currently using stl_phys() and >> friends. This goes through a full lookup in l1_phys_map. >> >> Looking at other devices, some use phys_ram_base + PA and stl_raw() >> which is broken but faster. A few places call >> cpu_get_physical_page_desc(), then use phys_ram_base and stl_raw(). >> This is okay but it still requires at least one l1_phys_map lookup >> per operation in the device (packet receive, io notification, etc.). >> I don't think that's going to help much because in our fast paths, >> we're only doing 2 or 3 stl_phys() operations. >> >> At least on x86, there are very few regions of RAM. That makes it >> very easy to cache. A TLB style cache seems wrong to me because >> there are so few RAM regions. I don't see a better way to do this >> with the existing APIs. > > I see your point. st/ldx_phys() were never optimized in fact. > > A first solution would be to use a cache similar to the TLBs. It has > the advantage is being quite generic and fast. Another solution would > be to compute a few intervals with are tested before the generic case. > These intervals would correspond to the main RAM area and would be > updated each time a new device region is registered. I currently have a patch that takes the later approach. > Does your remark implies that KVM switches back to the QEMU process > for each I/O ? If so, the l1_phys_map access time should be negligible > compared to the SVM-VMX/kernel/user context switch ! Most MMIO/PIO cause an exit to QEMU. We run the main loop in an dedicated thread though so packet delivery is handled without forcing a VCPU to exit. Regards, Anthony Liguori > Fabrice. > > >