From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1K3cdI-0007D1-IY for qemu-devel@nongnu.org; Tue, 03 Jun 2008 15:57:24 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1K3cdH-0007CV-Qt for qemu-devel@nongnu.org; Tue, 03 Jun 2008 15:57:24 -0400 Received: from [199.232.76.173] (port=57371 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1K3cdH-0007CR-LD for qemu-devel@nongnu.org; Tue, 03 Jun 2008 15:57:23 -0400 Received: from fmmailgate02.web.de ([217.72.192.227]:52071) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1K3cdH-0000lJ-EF for qemu-devel@nongnu.org; Tue, 03 Jun 2008 15:57:23 -0400 Received: from smtp08.web.de (fmsmtp08.dlan.cinetic.de [172.20.5.216]) by fmmailgate02.web.de (Postfix) with ESMTP id 5C589DFCE5D7 for ; Tue, 3 Jun 2008 21:56:07 +0200 (CEST) Received: from [88.65.38.172] (helo=[192.168.1.198]) by smtp08.web.de with asmtp (TLSv1:AES256-SHA:256) (WEB.DE 4.109 #226) id 1K3cc3-00087f-00 for qemu-devel@nongnu.org; Tue, 03 Jun 2008 21:56:07 +0200 Message-ID: <4845A1D6.5050005@web.de> Date: Tue, 03 Jun 2008 21:56:06 +0200 From: Jan Kiszka MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Sender: jan.kiszka@web.de Subject: [Qemu-devel] [PATCH] Introduce foreach_cpu shorthand Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cleanup patch to consolidate open-coded iterations over all CPUs via a foreach_cpu wrapper. Improves readability IMHO. Signed-off-by: Jan Kiszka --- cpu-defs.h | 3 +++ exec.c | 8 +++----- monitor.c | 6 +++--- vl.c | 4 ++-- 4 files changed, 11 insertions(+), 10 deletions(-) Index: b/cpu-defs.h =================================================================== --- a/cpu-defs.h +++ b/cpu-defs.h @@ -171,4 +171,7 @@ typedef struct CPUTLBEntry { \ const char *cpu_model_str; +#define foreach_cpu(env) \ + for (env = first_cpu; env != NULL; env = env->next_cpu) + #endif Index: b/exec.c =================================================================== --- a/exec.c +++ b/exec.c @@ -639,10 +639,9 @@ static inline void tb_phys_invalidate(Tr /* remove the TB from the hash list */ h = tb_jmp_cache_hash_func(tb->pc); - for(env = first_cpu; env != NULL; env = env->next_cpu) { + foreach_cpu(env) if (env->tb_jmp_cache[h] == tb) env->tb_jmp_cache[h] = NULL; - } /* suppress this TB from the two jump lists */ tb_jmp_remove(tb, 0); @@ -1649,7 +1648,7 @@ void cpu_physical_memory_reset_dirty(ram /* we modify the TLB cache so that the dirty bit will be set again when accessing the range */ start1 = start + (unsigned long)phys_ram_base; - for(env = first_cpu; env != NULL; env = env->next_cpu) { + foreach_cpu(env) { for(i = 0; i < CPU_TLB_SIZE; i++) tlb_reset_dirty_range(&env->tlb_table[0][i], start1, length); for(i = 0; i < CPU_TLB_SIZE; i++) @@ -2217,9 +2216,8 @@ void cpu_register_physical_memory(target /* since each CPU stores ram addresses in its TLB cache, we must reset the modified entries */ /* XXX: slow ! */ - for(env = first_cpu; env != NULL; env = env->next_cpu) { + foreach_cpu(env) tlb_flush(env, 1); - } } /* XXX: temporary until new memory mapping API */ Index: b/monitor.c =================================================================== --- a/monitor.c +++ b/monitor.c @@ -269,7 +269,7 @@ static int mon_set_cpu(int cpu_index) { CPUState *env; - for(env = first_cpu; env != NULL; env = env->next_cpu) { + foreach_cpu(env) { if (env->cpu_index == cpu_index) { mon_cpu = env; return 0; @@ -308,7 +308,7 @@ static void do_info_cpus(void) /* just to set the default cpu if not already done */ mon_get_cpu(); - for(env = first_cpu; env != NULL; env = env->next_cpu) { + foreach_cpu(env) { term_printf("%c CPU #%d:", (env == mon_cpu) ? '*' : ' ', env->cpu_index); @@ -1297,7 +1297,7 @@ static void do_inject_nmi(int cpu_index) { CPUState *env; - for (env = first_cpu; env != NULL; env = env->next_cpu) + foreach_cpu(env) if (env->cpu_index == cpu_index) { cpu_interrupt(env, CPU_INTERRUPT_NMI); break; Index: b/vl.c =================================================================== --- a/vl.c +++ b/vl.c @@ -470,7 +470,7 @@ void hw_error(const char *fmt, ...) fprintf(stderr, "qemu: hardware error: "); vfprintf(stderr, fmt, ap); fprintf(stderr, "\n"); - for(env = first_cpu; env != NULL; env = env->next_cpu) { + foreach_cpu(env) { fprintf(stderr, "CPU #%d:\n", env->cpu_index); #ifdef TARGET_I386 cpu_dump_state(env, stderr, fprintf, X86_DUMP_FPU); @@ -6047,7 +6047,7 @@ static int qemu_loadvm_state(QEMUFile *f ret = -1; goto the_end; } - for (env = first_cpu; env != NULL; env = env->next_cpu) + foreach_cpu(env) env->interrupt_request = 0; total_len = qemu_get_be64(f); end_pos = total_len + qemu_ftell(f);