From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1K3sdI-0004Uo-Vc for qemu-devel@nongnu.org; Wed, 04 Jun 2008 09:02:29 -0400 Received: from [199.232.76.173] (port=59519 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1K3sdI-0004UE-KR for qemu-devel@nongnu.org; Wed, 04 Jun 2008 09:02:28 -0400 Received: from mx1.polytechnique.org ([129.104.30.34]:35635) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1K3sdI-0007Kj-0p for qemu-devel@nongnu.org; Wed, 04 Jun 2008 09:02:28 -0400 Message-ID: <4846925C.5020605@bellard.org> Date: Wed, 04 Jun 2008 15:02:20 +0200 From: Fabrice Bellard MIME-Version: 1.0 References: <48455CEA.40507@suse.de> In-Reply-To: <48455CEA.40507@suse.de> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [PATCH] enable SVM EFER bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexander Graf Alexander Graf wrote: > Due to the recently introduces checks for SVM activation, the SVM > instructions currently throw a #UD exception if they are not activated. > The activation happens through a write to the EFER which does not > support the SVM bit yet. > > This patch adds the SVME bit to the EFER MSR write. It makes KVM work > for me again. OK for the problem, but the fix is not OK because you don't synchronize the hflags. It is strange that SVM can even work with that... I am working on a better fix. Fabrice.