From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1K62Ie-0006lp-Kw for qemu-devel@nongnu.org; Tue, 10 Jun 2008 07:46:04 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1K62Id-0006lV-4G for qemu-devel@nongnu.org; Tue, 10 Jun 2008 07:46:03 -0400 Received: from [199.232.76.173] (port=56209 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1K62Ic-0006lS-TC for qemu-devel@nongnu.org; Tue, 10 Jun 2008 07:46:02 -0400 Received: from li2-213.members.linode.com ([69.56.173.213]:34547 helo=mail.zilogic.com) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1K62Ib-00014O-QI for qemu-devel@nongnu.org; Tue, 10 Jun 2008 07:46:02 -0400 Received: from [172.16.245.252] (unknown [59.92.14.104]) by mail.zilogic.com (Postfix) with ESMTP id 6D9041055F for ; Tue, 10 Jun 2008 07:45:56 -0400 (EDT) Message-ID: <484E6A77.3080705@bravegnu.org> Date: Tue, 10 Jun 2008 17:20:15 +0530 From: Vijay Kumar MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH] Parallel Port Direction Fix Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org The direction bit in the control register should not be directly set using PPWCONTROL. The kernel gives the following debug message. parport0 (ppdev0): use data_reverse for this! More over setting the data pins to forward mode does not work, perhaps a bug in the Linux PP driver. The right way to do this is to use PPDATADIR to set the direction. The patch checks if the user is toggling the direction bit, and invokes PPDATADIR to do the job. Signed-off-by: Vijay Kumar B --- diff -Naur qemu-orig/hw/parallel.c qemu-mod/hw/parallel.c --- qemu-orig/hw/parallel.c 2008-06-10 16:58:10.000000000 +0530 +++ qemu-mod/hw/parallel.c 2008-06-10 16:47:23.000000000 +0530 @@ -129,6 +129,7 @@ { ParallelState *s = opaque; uint8_t parm = val; + int dir; /* Sometimes programs do several writes for timing purposes on old HW. Take care not to waste time on writes that do nothing. */ @@ -154,6 +155,17 @@ if (s->control == val) return; pdebug("wc%02x\n", val); + + if ((val & PARA_CTR_DIR) != (s->control & PARA_CTR_DIR)) { + if (val & PARA_CTR_DIR) { + dir = 1; + } else { + dir = 0; + } + qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_DATA_DIR, &dir); + parm &= ~PARA_CTR_DIR; + } + qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_WRITE_CONTROL, &parm); s->control = val; break; diff -Naur qemu-orig/qemu-char.h qemu-mod/qemu-char.h --- qemu-orig/qemu-char.h 2008-06-10 16:58:10.000000000 +0530 +++ qemu-mod/qemu-char.h 2008-06-10 16:39:24.000000000 +0530 @@ -27,6 +27,7 @@ #define CHR_IOCTL_PP_EPP_READ 9 #define CHR_IOCTL_PP_EPP_WRITE_ADDR 10 #define CHR_IOCTL_PP_EPP_WRITE 11 +#define CHR_IOCTL_PP_DATA_DIR 12 typedef void IOEventHandler(void *opaque, int event); diff -Naur qemu-orig/vl.c qemu-mod/vl.c --- qemu-orig/vl.c 2008-06-10 16:58:10.000000000 +0530 +++ qemu-mod/vl.c 2008-06-10 16:39:24.000000000 +0530 @@ -2525,6 +2525,10 @@ return -ENOTSUP; *(uint8_t *)arg = b; break; + case CHR_IOCTL_PP_DATA_DIR: + if (ioctl(fd, PPDATADIR, (int *)arg) < 0) + return -ENOTSUP; + break; case CHR_IOCTL_PP_EPP_READ_ADDR: if (pp_hw_mode(drv, IEEE1284_MODE_EPP|IEEE1284_ADDR)) { struct ParallelIOArg *parg = arg;