From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1K8ld2-0005s3-SO for qemu-devel@nongnu.org; Tue, 17 Jun 2008 20:34:24 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1K8ld1-0005ro-G4 for qemu-devel@nongnu.org; Tue, 17 Jun 2008 20:34:24 -0400 Received: from [199.232.76.173] (port=50780 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1K8ld1-0005rl-AQ for qemu-devel@nongnu.org; Tue, 17 Jun 2008 20:34:23 -0400 Received: from ns.suse.de ([195.135.220.2]:56354 helo=mx1.suse.de) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1K8ld0-0007w7-Fb for qemu-devel@nongnu.org; Tue, 17 Jun 2008 20:34:22 -0400 Received: from Relay2.suse.de (relay-ext.suse.de [195.135.221.8]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.suse.de (Postfix) with ESMTP id A53DA41236 for ; Wed, 18 Jun 2008 02:34:18 +0200 (CEST) Message-ID: <48585805.9070706@suse.de> Date: Wed, 18 Jun 2008 02:34:13 +0200 From: Alexander Graf MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------060407090100080807010101" Subject: [Qemu-devel] [PATCH] SVM: Trap on correct IP Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This is a multi-part message in MIME format. --------------060407090100080807010101 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Hi, Currently HLT always traps at the IP after the hlt instruction. SVM requires its trap on the instruction's IP though, which breaks the current implementation as soon as an HLT intercept occurs. This patch does the SVM intercept with an IP value before the HLT instruction. Alex Signed-off-by: Alexander Graf --------------060407090100080807010101 Content-Type: text/x-patch; name="qemu-svm-hlt.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="qemu-svm-hlt.patch" Index: target-i386/helper.h =================================================================== --- target-i386/helper.h (revision 4744) +++ target-i386/helper.h (working copy) @@ -60,7 +60,7 @@ DEF_HELPER(void, helper_syscall, (int next_eip_addend)) DEF_HELPER(void, helper_sysret, (int dflag)) #endif -DEF_HELPER(void, helper_hlt, (void)) +DEF_HELPER(void, helper_hlt, (int next_eip_addend)) DEF_HELPER(void, helper_monitor, (target_ulong ptr)) DEF_HELPER(void, helper_mwait, (void)) DEF_HELPER(void, helper_debug, (void)) Index: target-i386/op_helper.c =================================================================== --- target-i386/op_helper.c (revision 4744) +++ target-i386/op_helper.c (working copy) @@ -4547,9 +4547,10 @@ } #endif -void helper_hlt(void) +void helper_hlt(int next_eip_addend) { helper_svm_check_intercept_param(SVM_EXIT_HLT, 0); + EIP+=next_eip_addend; env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */ env->halted = 1; @@ -4575,7 +4576,7 @@ /* more than one CPU: do not sleep because another CPU may wake this one */ } else { - helper_hlt(); + helper_hlt(0); } } Index: target-i386/translate.c =================================================================== --- target-i386/translate.c (revision 4744) +++ target-i386/translate.c (working copy) @@ -6420,8 +6420,8 @@ } else { if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_jmp_im(s->pc - s->cs_base); - tcg_gen_helper_0_0(helper_hlt); + gen_jmp_im(pc_start - s->cs_base); + tcg_gen_helper_0_1(helper_hlt, tcg_const_i32(s->pc - pc_start)); s->is_jmp = 3; } break; --------------060407090100080807010101--