From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KAn9U-0005JH-Eg for qemu-devel@nongnu.org; Mon, 23 Jun 2008 10:36:16 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KAn9T-0005Iq-4K for qemu-devel@nongnu.org; Mon, 23 Jun 2008 10:36:16 -0400 Received: from [199.232.76.173] (port=33369 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KAn9S-0005Ij-VQ for qemu-devel@nongnu.org; Mon, 23 Jun 2008 10:36:15 -0400 Received: from gecko.sbs.de ([194.138.37.40]:19934) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KAn9S-0004tG-Jz for qemu-devel@nongnu.org; Mon, 23 Jun 2008 10:36:15 -0400 Received: from mail1.sbs.de (localhost [127.0.0.1]) by gecko.sbs.de (8.12.11.20060308/8.12.11) with ESMTP id m5NEZnvY002137 for ; Mon, 23 Jun 2008 16:35:49 +0200 Received: from [139.25.109.167] (mchn012c.ww002.siemens.net [139.25.109.167] (may be forged)) by mail1.sbs.de (8.12.11.20060308/8.12.11) with ESMTP id m5NEZnQA017950 for ; Mon, 23 Jun 2008 16:35:49 +0200 Resent-To: qemu-devel@nongnu.org Resent-Message-Id: <485FB4C5.3000209@siemens.com> Message-ID: <485FB1CE.3090107@siemens.com> Date: Mon, 23 Jun 2008 16:23:10 +0200 From: Jan Kiszka MIME-Version: 1.0 References: <485FB18E.1090801@siemens.com> In-Reply-To: <485FB18E.1090801@siemens.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH 1/15] Convert remaining __builtin_expect to likely/unlikely Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org QEMU wraps __builtin_expect with the more handy likely/unlikely macros, but doesn't use them consequently. This patch removes the remaining __builtin_expect spots. Signed-off-by: Jan Kiszka --- cpu-exec.c | 6 +++--- exec-all.h | 4 ++-- softmmu_header.h | 12 ++++++------ target-arm/op_helper.c | 2 +- target-arm/translate.c | 4 ++-- target-cris/op_helper.c | 2 +- target-cris/translate.c | 2 +- target-m68k/op_helper.c | 2 +- target-m68k/translate.c | 4 ++-- 9 files changed, 19 insertions(+), 19 deletions(-) Index: b/cpu-exec.c =================================================================== --- a/cpu-exec.c +++ b/cpu-exec.c @@ -221,8 +221,8 @@ static inline TranslationBlock *tb_find_ #error unsupported CPU #endif tb = env->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]; - if (__builtin_expect(!tb || tb->pc != pc || tb->cs_base != cs_base || - tb->flags != flags, 0)) { + if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base || + tb->flags != flags)) { tb = tb_find_slow(pc, cs_base, flags); } return tb; @@ -357,7 +357,7 @@ int cpu_exec(CPUState *env1) next_tb = 0; /* force lookup of first TB */ for(;;) { interrupt_request = env->interrupt_request; - if (__builtin_expect(interrupt_request, 0) && + if (unlikely(interrupt_request) && likely(!(env->singlestep_enabled & SSTEP_NOIRQ))) { if (interrupt_request & CPU_INTERRUPT_DEBUG) { env->interrupt_request &= ~CPU_INTERRUPT_DEBUG; Index: b/exec-all.h =================================================================== --- a/exec-all.h +++ b/exec-all.h @@ -350,8 +350,8 @@ static inline target_ulong get_phys_addr page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx = cpu_mmu_index(env1); - if (__builtin_expect(env1->tlb_table[mmu_idx][page_index].addr_code != - (addr & TARGET_PAGE_MASK), 0)) { + if (unlikely(env1->tlb_table[mmu_idx][page_index].addr_code != + (addr & TARGET_PAGE_MASK))) { ldub_code(addr); } pd = env1->tlb_table[mmu_idx][page_index].addr_code & ~TARGET_PAGE_MASK; Index: b/softmmu_header.h =================================================================== --- a/softmmu_header.h +++ b/softmmu_header.h @@ -231,8 +231,8 @@ static inline RES_TYPE glue(glue(ld, USU addr = ptr; page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx = CPU_MMU_INDEX; - if (__builtin_expect(env->tlb_table[mmu_idx][page_index].ADDR_READ != - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { + if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != + (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); } else { physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; @@ -252,8 +252,8 @@ static inline int glue(glue(lds, SUFFIX) addr = ptr; page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx = CPU_MMU_INDEX; - if (__builtin_expect(env->tlb_table[mmu_idx][page_index].ADDR_READ != - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { + if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != + (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); } else { physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; @@ -277,8 +277,8 @@ static inline void glue(glue(st, SUFFIX) addr = ptr; page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx = CPU_MMU_INDEX; - if (__builtin_expect(env->tlb_table[mmu_idx][page_index].addr_write != - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { + if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write != + (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx); } else { physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; Index: b/target-arm/op_helper.c =================================================================== --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -97,7 +97,7 @@ void tlb_fill (target_ulong addr, int is saved_env = env; env = cpu_single_env; ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx, 1); - if (__builtin_expect(ret, 0)) { + if (unlikely(ret)) { if (retaddr) { /* now we have a real cpu fault */ pc = (unsigned long)retaddr; Index: b/target-arm/translate.c =================================================================== --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -3390,7 +3390,7 @@ static inline void gen_goto_tb(DisasCont static inline void gen_jmp (DisasContext *s, uint32_t dest) { - if (__builtin_expect(s->singlestep_enabled, 0)) { + if (unlikely(s->singlestep_enabled)) { /* An indirect jump so that we still trigger the debug exception. */ if (s->thumb) dest |= 1; @@ -8666,7 +8666,7 @@ static inline int gen_intermediate_code_ /* At this stage dc->condjmp will only be set when the skipped instruction was a conditional branch or trap, and the PC has already been written. */ - if (__builtin_expect(env->singlestep_enabled, 0)) { + if (unlikely(env->singlestep_enabled)) { /* Make sure the pc is updated, and raise a debug exception. */ if (dc->condjmp) { gen_set_condexec(dc); Index: b/target-cris/op_helper.c =================================================================== --- a/target-cris/op_helper.c +++ b/target-cris/op_helper.c @@ -61,7 +61,7 @@ void tlb_fill (target_ulong addr, int is D(fprintf(logfile, "%s pc=%x tpc=%x ra=%x\n", __func__, env->pc, env->debug1, retaddr)); ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx, 1); - if (__builtin_expect(ret, 0)) { + if (unlikely(ret)) { if (retaddr) { /* now we have a real cpu fault */ pc = (unsigned long)retaddr; Index: b/target-cris/translate.c =================================================================== --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -3173,7 +3173,7 @@ gen_intermediate_code_internal(CPUState cris_evaluate_flags (dc); - if (__builtin_expect(env->singlestep_enabled, 0)) { + if (unlikely(env->singlestep_enabled)) { tcg_gen_movi_tl(env_pc, npc); t_gen_raise_exception(EXCP_DEBUG); } else { Index: b/target-m68k/op_helper.c =================================================================== --- a/target-m68k/op_helper.c +++ b/target-m68k/op_helper.c @@ -61,7 +61,7 @@ void tlb_fill (target_ulong addr, int is saved_env = env; env = cpu_single_env; ret = cpu_m68k_handle_mmu_fault(env, addr, is_write, mmu_idx, 1); - if (__builtin_expect(ret, 0)) { + if (unlikely(ret)) { if (retaddr) { /* now we have a real cpu fault */ pc = (unsigned long)retaddr; Index: b/target-m68k/translate.c =================================================================== --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -871,7 +871,7 @@ static void gen_jmp_tb(DisasContext *s, TranslationBlock *tb; tb = s->tb; - if (__builtin_expect (s->singlestep_enabled, 0)) { + if (unlikely(s->singlestep_enabled)) { gen_exception(s, dest, EXCP_DEBUG); } else if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK) || (s->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK)) { @@ -2974,7 +2974,7 @@ gen_intermediate_code_internal(CPUState !env->singlestep_enabled && (pc_offset) < (TARGET_PAGE_SIZE - 32)); - if (__builtin_expect(env->singlestep_enabled, 0)) { + if (unlikely(env->singlestep_enabled)) { /* Make sure the pc is updated, and raise a debug exception. */ if (!dc->is_jmp) { gen_flush_cc_op(dc);