Re: [PATCH 1/6] tcg: Introduce the 'z' constraint for a hardware zero register

[Richard Henderson <richard.henderson@linaro.org>]

On 2/13/25 07:45, Philippe Mathieu-Daudé wrote:
> On 12/2/25 04:46, Richard Henderson wrote:
>> For loongarch, mips, riscv and sparc, a zero register is
>> available all the time.  For aarch64, register index 31
>> depends on context: sometimes it is the stack pointer,
>> and sometimes it is the zero register.
>>
>> Introduce a new general-purpose constraint which maps 0
>> to TCG_REG_ZERO, if defined.  This differs from existing
>> constant constraints in that const_arg[*] is recorded as
>> false, indicating that the value is in a register.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   include/tcg/tcg.h            |  3 ++-
>>   tcg/aarch64/tcg-target.h     |  2 ++
>>   tcg/loongarch64/tcg-target.h |  2 ++
>>   tcg/mips/tcg-target.h        |  2 ++
>>   tcg/riscv/tcg-target.h       |  2 ++
>>   tcg/sparc64/tcg-target.h     |  3 ++-
>>   tcg/tcg.c                    | 29 ++++++++++++++++++++++-------
>>   docs/devel/tcg-ops.rst       |  4 +++-
>>   8 files changed, 37 insertions(+), 10 deletions(-)
> 
> 
>> diff --git a/docs/devel/tcg-ops.rst b/docs/devel/tcg-ops.rst
>> index 6608a29376..75acb4bd32 100644
>> --- a/docs/devel/tcg-ops.rst
>> +++ b/docs/devel/tcg-ops.rst
>> @@ -927,7 +927,9 @@ operation uses a constant input constraint which does not allow all
>>   constants, it must also accept registers in order to have a fallback.
>>   The constraint '``i``' is defined generically to accept any constant.
>>   The constraint '``r``' is not defined generically, but is consistently
>> -used by each backend to indicate all registers.
>> +used by each backend to indicate all registers.  If ``TCG_REG_ZERO``
>> +is defined by the backend, the constraint '``z``' is defined generically
> 
> and/to?
> 
>> +map 0 to the hardware zero register.

Indeed, this was not grammatical.  Fixed as

... the constraint '``z``' is defined generically
to map constant 0 to the hardware zero register.

> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Thanks.

r~