Re: [PATCH v4 07/17] hw/misc: Add support for NPCM8XX GCR

["Philippe Mathieu-Daudé" <philmd@linaro.org>]

Hi,

On 6/2/25 23:11, Hao Wu wrote:
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Hao Wu <wuhaotsh@google.com>
> ---
>   hw/misc/npcm_gcr.c         | 129 ++++++++++++++++++++++++++++++++++++-
>   include/hw/misc/npcm_gcr.h |   6 +-
>   2 files changed, 132 insertions(+), 3 deletions(-)


> diff --git a/include/hw/misc/npcm_gcr.h b/include/hw/misc/npcm_gcr.h
> index 9af24e5cdc..9ac76ca9ab 100644
> --- a/include/hw/misc/npcm_gcr.h
> +++ b/include/hw/misc/npcm_gcr.h
> @@ -1,5 +1,5 @@
>   /*
> - * Nuvoton NPCM7xx System Global Control Registers.
> + * Nuvoton NPCM7xx/8xx System Global Control Registers.
>    *
>    * Copyright 2020 Google LLC
>    *
> @@ -54,8 +54,9 @@
>    * Number of registers in our device state structure. Don't change this without
>    * incrementing the version_id in the vmstate.
>    */
> -#define NPCM_GCR_MAX_NR_REGS NPCM7XX_GCR_NR_REGS
> +#define NPCM_GCR_MAX_NR_REGS NPCM8XX_GCR_NR_REGS

This breaks vmstate_npcm_gcr.

If it isn't too important (I don't think so as not a versioned machine)
you can just bump the *version_ids.

>   #define NPCM7XX_GCR_NR_REGS (0x148 / sizeof(uint32_t))
> +#define NPCM8XX_GCR_NR_REGS (0xf80 / sizeof(uint32_t))