From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KV6CK-0006yi-6v for qemu-devel@nongnu.org; Mon, 18 Aug 2008 10:59:08 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KV6CI-0006xl-G5 for qemu-devel@nongnu.org; Mon, 18 Aug 2008 10:59:07 -0400 Received: from [199.232.76.173] (port=53223 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KV6CI-0006xd-51 for qemu-devel@nongnu.org; Mon, 18 Aug 2008 10:59:06 -0400 Received: from ns.suse.de ([195.135.220.2]:42729 helo=mx1.suse.de) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KV6CH-0007QD-JH for qemu-devel@nongnu.org; Mon, 18 Aug 2008 10:59:05 -0400 Received: from Relay1.suse.de (mail2.suse.de [195.135.221.8]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.suse.de (Postfix) with ESMTP id 61F2F416E8 for ; Mon, 18 Aug 2008 16:59:03 +0200 (CEST) Message-ID: <48A9820F.40307@suse.de> Date: Mon, 18 Aug 2008 16:07:11 +0200 From: Alexander Graf MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------090006030201000302030205" Subject: [Qemu-devel] [PATCH 1/3] [x86] Clean up vendor identification v2 Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This is a multi-part message in MIME format. --------------090006030201000302030205 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Right now CPU vendor identification contains a lot of magic numbers. The patch cleans them up to defines, so we can identify the CPU later on without copying magic numbers. Signed-off-by: Alexander Graf --------------090006030201000302030205 Content-Type: text/x-patch; name="se01-clean-vendor.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="se01-clean-vendor.patch" diff --git a/qemu/target-i386/cpu.h b/qemu/target-i386/cpu.h index 7e95900..3c84dc9 100644 --- a/qemu/target-i386/cpu.h +++ b/qemu/target-i386/cpu.h @@ -339,6 +341,14 @@ #define CPUID_EXT3_IBS (1 << 10) #define CPUID_EXT3_SKINIT (1 << 12) +#define CPUID_VENDOR_INTEL_1 0x756e6547 /* "Genu" */ +#define CPUID_VENDOR_INTEL_2 0x49656e69 /* "ineI" */ +#define CPUID_VENDOR_INTEL_3 0x6c65746e /* "ntel" */ + +#define CPUID_VENDOR_AMD_1 0x68747541 /* "Auth" */ +#define CPUID_VENDOR_AMD_2 0x69746e65 /* "enti" */ +#define CPUID_VENDOR_AMD_3 0x444d4163 /* "cAMD" */ + #define EXCP00_DIVZ 0 #define EXCP01_SSTP 1 #define EXCP02_NMI 2 diff --git a/qemu/target-i386/helper.c b/qemu/target-i386/helper.c index 73ce7da..0a02a90 100644 --- a/qemu/target-i386/helper.c +++ b/qemu/target-i386/helper.c @@ -154,9 +154,9 @@ static x86_def_t x86_defs[] = { { .name = "qemu64", .level = 2, - .vendor1 = 0x68747541, /* "Auth" */ - .vendor2 = 0x69746e65, /* "enti" */ - .vendor3 = 0x444d4163, /* "cAMD" */ + .vendor1 = CPUID_VENDOR_AMD_1, + .vendor2 = CPUID_VENDOR_AMD_2, + .vendor3 = CPUID_VENDOR_AMD_3, .family = 6, .model = 2, .stepping = 3, @@ -355,9 +372,9 @@ static int cpu_x86_register (CPUX86State *env, const char *cpu_model) env->cpuid_vendor2 = def->vendor2; env->cpuid_vendor3 = def->vendor3; } else { - env->cpuid_vendor1 = 0x756e6547; /* "Genu" */ - env->cpuid_vendor2 = 0x49656e69; /* "ineI" */ - env->cpuid_vendor3 = 0x6c65746e; /* "ntel" */ + env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1; + env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2; + env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3; } env->cpuid_level = def->level; env->cpuid_version = (def->family << 8) | (def->model << 4) | def->stepping; --------------090006030201000302030205--