From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KVpV1-0006QM-Rd for qemu-devel@nongnu.org; Wed, 20 Aug 2008 11:21:27 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KVpUz-0006PE-EQ for qemu-devel@nongnu.org; Wed, 20 Aug 2008 11:21:26 -0400 Received: from [199.232.76.173] (port=34681 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KVpUz-0006P1-5P for qemu-devel@nongnu.org; Wed, 20 Aug 2008 11:21:25 -0400 Received: from gecko.sbs.de ([194.138.37.40]:17954) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KVpUy-0000dP-F2 for qemu-devel@nongnu.org; Wed, 20 Aug 2008 11:21:24 -0400 Received: from mail1.sbs.de (localhost [127.0.0.1]) by gecko.sbs.de (8.12.11.20060308/8.12.11) with ESMTP id m7KFLLNo030851 for ; Wed, 20 Aug 2008 17:21:21 +0200 Received: from [139.25.109.167] (mchn012c.mchp.siemens.de [139.25.109.167] (may be forged)) by mail1.sbs.de (8.12.11.20060308/8.12.11) with ESMTP id m7KFLLt6002080 for ; Wed, 20 Aug 2008 17:21:21 +0200 Resent-To: qemu-devel@nongnu.org Resent-Message-Id: <48AC3672.3060509@siemens.com> Message-ID: <48AC2FC5.3000707@siemens.com> Date: Wed, 20 Aug 2008 16:52:53 +0200 From: Jan Kiszka MIME-Version: 1.0 References: <486CF559.5090805@siemens.com> <48AC2E09.3030405@siemens.com> In-Reply-To: <48AC2E09.3030405@siemens.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [RESEND][PATCH 5/13] Introduce next_cflags Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Introduce next_cflags as part of CPUState. It controls the compile flags of the next newly generated TB. After use, it will automatically be reset to zero. This allows the caller to simply set and then forget about it, e.g. to ensure that the next, and only the next TB will contain just a single instruction. To avoid that next_cflags hits the wrong TB, interrupt delivery is suppressed when this field is non-zero. Signed-off-by: Jan Kiszka --- cpu-defs.h | 4 ++++ cpu-exec.c | 9 +++++++-- 2 files changed, 11 insertions(+), 2 deletions(-) Index: b/cpu-defs.h =================================================================== --- a/cpu-defs.h +++ b/cpu-defs.h @@ -183,6 +183,10 @@ typedef struct CPUWatchpoint { } icount_decr; \ uint32_t can_do_io; /* nonzero if memory mapped IO is safe. */ \ \ + /* Compile flags for generating next regular TB. \ + Will be automatically zeroed after use. */ \ + uint16_t next_cflags; \ + \ /* from this point: preserved by CPU reset */ \ /* ice debug support */ \ CPUBreakpoint *breakpoints; \ Index: b/cpu-exec.c =================================================================== --- a/cpu-exec.c +++ b/cpu-exec.c @@ -150,7 +150,8 @@ static TranslationBlock *tb_find_slow(ta } not_found: /* if no translated code available, then translate it now */ - tb = tb_gen_code(env, pc, cs_base, flags, 0); + tb = tb_gen_code(env, pc, cs_base, flags, env->next_cflags); + env->next_cflags = 0; found: /* we add the TB in the virtual pc hash table */ @@ -361,8 +362,12 @@ int cpu_exec(CPUState *env1) next_tb = 0; /* force lookup of first TB */ for(;;) { interrupt_request = env->interrupt_request; + /* Deliver interrupt, but only if we are not recompiling some + TB (non-zero next_cflags) and the current single-step mode + doesn't block IRQs. */ if (unlikely(interrupt_request) && - likely(!(env->singlestep_enabled & SSTEP_NOIRQ))) { + likely(env->next_cflags == 0 && + !(env->singlestep_enabled & SSTEP_NOIRQ))) { if (interrupt_request & CPU_INTERRUPT_DEBUG) { env->interrupt_request &= ~CPU_INTERRUPT_DEBUG; env->exception_index = EXCP_DEBUG;