From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KVpPt-0004Hs-H8 for qemu-devel@nongnu.org; Wed, 20 Aug 2008 11:16:09 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KVpPr-0004HU-MQ for qemu-devel@nongnu.org; Wed, 20 Aug 2008 11:16:08 -0400 Received: from [199.232.76.173] (port=54382 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KVpPr-0004HK-Do for qemu-devel@nongnu.org; Wed, 20 Aug 2008 11:16:07 -0400 Received: from gecko.sbs.de ([194.138.37.40]:16033) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KVpPq-0007aO-DX for qemu-devel@nongnu.org; Wed, 20 Aug 2008 11:16:06 -0400 Received: from mail2.sbs.de (localhost [127.0.0.1]) by gecko.sbs.de (8.12.11.20060308/8.12.11) with ESMTP id m7KFG4q3025408 for ; Wed, 20 Aug 2008 17:16:04 +0200 Received: from [139.25.109.167] (mchn012c.mchp.siemens.de [139.25.109.167] (may be forged)) by mail2.sbs.de (8.12.11.20060308/8.12.11) with ESMTP id m7KFG4uN022093 for ; Wed, 20 Aug 2008 17:16:04 +0200 Message-ID: <48AC3535.2080506@siemens.com> Date: Wed, 20 Aug 2008 17:16:05 +0200 From: Jan Kiszka MIME-Version: 1.0 References: <48A998AB.5080409@web.de> In-Reply-To: <48A998AB.5080409@web.de> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH 1/2] De-assert ISA PIC IRQs properly Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org [ Taking latest isapc changes into account. ] In case the PIC IRQ gets de-asserted on an isapc machine, we also have to reset CPU_INTERRUPT_HARD. This is what older qemu (before the routing-through-APIC changes) used to do as well. Signed-off-by: Jan Kiszka --- hw/pc.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) Index: b/hw/pc.c =================================================================== --- a/hw/pc.c +++ b/hw/pc.c @@ -118,17 +118,19 @@ static void pic_irq_request(void *opaque { CPUState *env = first_cpu; - if (!level) - return; - if (env->apic_state) { + if (!level) + return; while (env) { if (apic_accept_pic_intr(env)) apic_local_deliver(env, APIC_LINT0); env = env->next_cpu; } } else { - cpu_interrupt(env, CPU_INTERRUPT_HARD); + if (level) + cpu_interrupt(env, CPU_INTERRUPT_HARD); + else + cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); } }