From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KdPTM-0006V2-Gk for qemu-devel@nongnu.org; Wed, 10 Sep 2008 09:11:04 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KdPTJ-0006Tp-TI for qemu-devel@nongnu.org; Wed, 10 Sep 2008 09:11:03 -0400 Received: from [199.232.76.173] (port=51916 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KdPTJ-0006Tg-HC for qemu-devel@nongnu.org; Wed, 10 Sep 2008 09:11:01 -0400 Received: from e2.ny.us.ibm.com ([32.97.182.142]:39252) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KdPTJ-0000bp-Ch for qemu-devel@nongnu.org; Wed, 10 Sep 2008 09:11:01 -0400 Received: from d01relay02.pok.ibm.com (d01relay02.pok.ibm.com [9.56.227.234]) by e2.ny.us.ibm.com (8.13.8/8.13.8) with ESMTP id m8ADB0MT009034 for ; Wed, 10 Sep 2008 09:11:00 -0400 Received: from d01av03.pok.ibm.com (d01av03.pok.ibm.com [9.56.224.217]) by d01relay02.pok.ibm.com (8.13.8/8.13.8/NCO v9.1) with ESMTP id m8ADB0VG229908 for ; Wed, 10 Sep 2008 09:11:00 -0400 Received: from d01av03.pok.ibm.com (loopback [127.0.0.1]) by d01av03.pok.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id m8ADB0gm007735 for ; Wed, 10 Sep 2008 09:11:00 -0400 Message-ID: <48C7C72D.4090704@us.ibm.com> Date: Wed, 10 Sep 2008 08:10:05 -0500 From: Anthony Liguori MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH 7/10] Switch the memory savevm handler to be "live" References: <1220989802-13706-1-git-send-email-aliguori@us.ibm.com> <1220989802-13706-8-git-send-email-aliguori@us.ibm.com> <48C7748D.6070600@qumranet.com> In-Reply-To: <48C7748D.6070600@qumranet.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: Chris Wright , Uri Lublin , qemu-devel@nongnu.org, kvm@vger.kernel.org Avi Kivity wrote: > Anthony Liguori wrote: >> This patch replaces the static memory savevm/loadvm handler with a >> "live" one. >> This handler is used even if performing a non-live migration. >> >> The key difference between this handler and the previous is that each >> page is >> prefixed with the address of the page. The QEMUFile rate limiting >> code, in >> combination with the live migration dirty tracking bits, is used to >> determine >> which pages should be sent and how many should be sent. >> >> The live save code "converges" when the number of dirty pages reaches >> a fixed >> amount. Currently, this is 10 pages. This is something that should >> eventually >> be derived from whatever the bandwidth limitation is. >> >> + >> +static int ram_save_block(QEMUFile *f) >> +{ >> + static ram_addr_t current_addr = 0; >> + ram_addr_t saved_addr = current_addr; >> + ram_addr_t addr = 0; >> + int found = 0; >> + >> + while (addr < phys_ram_size) { >> + if (cpu_physical_memory_get_dirty(current_addr, >> MIGRATION_DIRTY_FLAG)) { >> + uint8_t ch; >> + >> + cpu_physical_memory_reset_dirty(current_addr, >> + current_addr + >> TARGET_PAGE_SIZE, >> + MIGRATION_DIRTY_FLAG); >> + >> + ch = *(phys_ram_base + current_addr); >> > > Looks like you're using qemu ram addresses. The problem with these is > that they have no stable meaning. Switching the initialization order > of vga and memory would break compatibility. This is true, but keep in mind, the current save/restore code saves the whole chunk of qemu ram. So switching the initialization order of vga and memory would currently break save/restore compatibility. I agree we should try to solve this. Regards, Anthony Liguori > We should separate RAM saving according to the owners of the RAM > blocks. For example vga would be responsible for moving the > framebuffer (which has no stable hardware address, either), and > something else would be responsible for migrating RAM. Of course both > would call into common code. >