Add interrupt logging for MIPS targets.

Signed-off-by: Stefan Weil <weil@mail.berlios.de> 

Index: hw/mips_int.c
===================================================================
--- hw/mips_int.c	(Revision 5400)
+++ hw/mips_int.c	(Arbeitskopie)
@@ -1,6 +1,7 @@
 #include "hw.h"
 #include "mips.h"
 #include "cpu.h"
+#include "qemu-log.h"
 
 /* Raise IRQ to CPU if necessary. It must be called every time the active
    IRQ may change */
@@ -12,10 +13,28 @@
         !(env->hflags & MIPS_HFLAG_DM)) {
         if ((env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask) &&
             !(env->interrupt_request & CPU_INTERRUPT_HARD)) {
+            if (loglevel & CPU_LOG_INT) {
+                fprintf(logfile, "%s: cpu_interrupt (0x%08x,0x%08x)\n", __func__,
+                  env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask,
+                  env->interrupt_request);
+                cpu_dump_state(env, logfile, fprintf, 0);
+            }
             cpu_interrupt(env, CPU_INTERRUPT_HARD);
-	}
-    } else
+        } else {
+            if (loglevel & CPU_LOG_INT) {
+                fprintf(logfile, "%s: no interrupt (0x%08x,0x%08x)\n", __func__,
+                  env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask,
+                  env->interrupt_request);
+                cpu_dump_state(env, logfile, fprintf, 0);
+            }
+        }
+    } else {
+        if (loglevel & CPU_LOG_INT) {
+            fprintf(logfile, "%s: cpu_reset_interrupt\n", __func__);
+            cpu_dump_state(env, logfile, fprintf, 0);
+        }
         cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
+    }
 }
 
 static void cpu_mips_irq_request(void *opaque, int irq, int level)