* [Qemu-devel] [PATCH] x86: Fix conditions for Virtual Wire IRQ delivery
@ 2008-10-20 12:25 Jan Kiszka
2008-10-23 8:06 ` [Qemu-devel] " Jan Kiszka
0 siblings, 1 reply; 2+ messages in thread
From: Jan Kiszka @ 2008-10-20 12:25 UTC (permalink / raw)
To: qemu-devel
QEMU is implementing the Virtual Wire mode to attach the PIC to modern,
APIC-supporting CPUs. But Intel's MP spec says that PIC interrupts then
flow through the APICs, thus they also have to be enabled. Patch below
fixes the test logic accordingly, avoiding delivery in case an APIC is
disabled.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
hw/apic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/hw/apic.c
===================================================================
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -526,7 +526,7 @@ int apic_accept_pic_intr(CPUState *env)
lvt0 = s->lvt[APIC_LVT_LINT0];
- if ((s->apicbase & MSR_IA32_APICBASE_ENABLE) == 0 ||
+ if ((s->apicbase & MSR_IA32_APICBASE_ENABLE) &&
(lvt0 & APIC_LVT_MASKED) == 0)
return 1;
--
Siemens AG, Corporate Technology, CT SE 2
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 2+ messages in thread
* [Qemu-devel] Re: [PATCH] x86: Fix conditions for Virtual Wire IRQ delivery
2008-10-20 12:25 [Qemu-devel] [PATCH] x86: Fix conditions for Virtual Wire IRQ delivery Jan Kiszka
@ 2008-10-23 8:06 ` Jan Kiszka
0 siblings, 0 replies; 2+ messages in thread
From: Jan Kiszka @ 2008-10-23 8:06 UTC (permalink / raw)
To: qemu-devel
Jan Kiszka wrote:
> QEMU is implementing the Virtual Wire mode to attach the PIC to modern,
> APIC-supporting CPUs. But Intel's MP spec says that PIC interrupts then
> flow through the APICs, thus they also have to be enabled. Patch below
> fixes the test logic accordingly, avoiding delivery in case an APIC is
> disabled.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
> hw/apic.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Index: b/hw/apic.c
> ===================================================================
> --- a/hw/apic.c
> +++ b/hw/apic.c
> @@ -526,7 +526,7 @@ int apic_accept_pic_intr(CPUState *env)
>
> lvt0 = s->lvt[APIC_LVT_LINT0];
>
> - if ((s->apicbase & MSR_IA32_APICBASE_ENABLE) == 0 ||
> + if ((s->apicbase & MSR_IA32_APICBASE_ENABLE) &&
> (lvt0 & APIC_LVT_MASKED) == 0)
> return 1;
>
This patch turned out to be incorrect (SDM 3A, 5.3.1), please ignore it.
Jan
--
Siemens AG, Corporate Technology, CT SE 2
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 2+ messages in thread
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