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([2001:b07:6468:f312:5e2c:eb9a:a8b6:fd3e]) by smtp.gmail.com with ESMTPSA id s6sm4270905ejb.122.2020.11.26.20.59.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 26 Nov 2020 20:59:24 -0800 (PST) Subject: Re: [PATCH 7/8] arm: Add Hypervisor.framework build target To: Alexander Graf , qemu-devel@nongnu.org References: <20201126215017.41156-1-agraf@csgraf.de> <20201126215017.41156-8-agraf@csgraf.de> From: Paolo Bonzini Message-ID: <48aa3247-9d1b-301f-adb5-7779cdbbf37b@redhat.com> Date: Fri, 27 Nov 2020 05:59:22 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.4.0 MIME-Version: 1.0 In-Reply-To: <20201126215017.41156-8-agraf@csgraf.de> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=pbonzini@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=63.128.21.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Richard Henderson , Cameron Esfahani , Roman Bolshakov , qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 26/11/20 22:50, Alexander Graf wrote: > Now that we have all logic in place that we need to handle Hypervisor.framework > on Apple Silicon systems, let's add CONFIG_HVF for aarch64 as well so that we > can build it. > > Signed-off-by: Alexander Graf Between patch 1 and this one, this series is a nice showcase for the good, the bad and the ugly of Meson... :) > diff --git a/meson.build b/meson.build > index 2a7ff5560c..21565f5787 100644 > --- a/meson.build > +++ b/meson.build > @@ -74,16 +74,23 @@ else > endif > > accelerator_targets = { 'CONFIG_KVM': kvm_targets } > + > +if cpu in ['x86', 'x86_64'] > + hvf_targets = ['i386-softmmu', 'x86_64-softmmu'] > +elif cpu in ['aarch64'] > + hvf_targets = ['aarch64-softmmu'] > +endif > + > if cpu in ['x86', 'x86_64', 'arm', 'aarch64'] This would fail to compile on 32-bit ARM. Simpler to add an "hvf_targets = []" else branch above, and add "'CONFIG_HVF': hvf_targets" unconditionally. That is, copy even more of what it is doing for KVM. Paolo > # i368 emulator provides xenpv machine type for multiple architectures > accelerator_targets += { > 'CONFIG_XEN': ['i386-softmmu', 'x86_64-softmmu'], > + 'CONFIG_HVF': hvf_targets, > } > endif > if cpu in ['x86', 'x86_64'] > accelerator_targets += { > 'CONFIG_HAX': ['i386-softmmu', 'x86_64-softmmu'], > - 'CONFIG_HVF': ['x86_64-softmmu'], > 'CONFIG_WHPX': ['i386-softmmu', 'x86_64-softmmu'], > } > endif > diff --git a/target/arm/hvf/meson.build b/target/arm/hvf/meson.build > new file mode 100644 > index 0000000000..855e6cce5a > --- /dev/null > +++ b/target/arm/hvf/meson.build > @@ -0,0 +1,3 @@ > +arm_softmmu_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files( > + 'hvf.c', > +)) > diff --git a/target/arm/meson.build b/target/arm/meson.build > index f5de2a77b8..95bebae216 100644 > --- a/target/arm/meson.build > +++ b/target/arm/meson.build > @@ -56,5 +56,7 @@ arm_softmmu_ss.add(files( > 'psci.c', > )) > > +subdir('hvf') > + > target_arch += {'arm': arm_ss} > target_softmmu_arch += {'arm': arm_softmmu_ss} >