From: Richard Henderson <richard.henderson@linaro.org>
To: Taylor Simpson <tsimpson@quicinc.com>, qemu-devel@nongnu.org
Cc: philmd@linaro.org, ale@rev.ng, anjo@rev.ng, bcain@quicinc.com,
quic_mathbern@quicinc.com
Subject: Re: [PATCH 14/21] Hexagon (target/hexagon) Short-circuit more HVX single instruction packets
Date: Thu, 27 Apr 2023 11:44:16 +0100 [thread overview]
Message-ID: <48ba31dc-aba6-8737-a8b9-e15be356eda0@linaro.org> (raw)
In-Reply-To: <20230426004234.1319401-5-tsimpson@quicinc.com>
On 4/26/23 01:42, Taylor Simpson wrote:
> The generated helpers for HVX use pass-by-reference, so they can't
> short-circuit when the reads/writes overlap. The instructions with
> overrides are OK because they use tcg_gen_gvec_*.
>
> We add a flag has_hvx_helper to DisasContext and extend gen_analyze_funcs
> to set the flag when the instruction is an HVX instruction with a
> generated helper.
>
> We add an override for V6_vcombine so that it can be short-circuited
> along with a test case in tests/tcg/hexagon/hvx_misc.c
>
> Signed-off-by: Taylor Simpson<tsimpson@quicinc.com>
> ---
> target/hexagon/gen_tcg_hvx.h | 23 +++++++++++++++++++++++
> target/hexagon/translate.h | 1 +
> target/hexagon/translate.c | 17 +++++++++++++++--
> tests/tcg/hexagon/hvx_misc.c | 21 +++++++++++++++++++++
> target/hexagon/gen_analyze_funcs.py | 5 +++++
> 5 files changed, 65 insertions(+), 2 deletions(-)
Ideally the vcombine override would be a separate patch.
Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2023-04-27 10:44 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-26 0:42 [PATCH 10/21] Hexagon (target/hexagon) Mark registers as read during packet analysis Taylor Simpson
2023-04-26 0:42 ` [PATCH 11/21] Hexagon (target/hexagon) Short-circuit packet register writes Taylor Simpson
2023-04-27 10:40 ` Richard Henderson
2023-04-26 0:42 ` [PATCH 12/21] Hexagon (target/hexagon) Short-circuit packet predicate writes Taylor Simpson
2023-04-27 10:41 ` Richard Henderson
2023-04-26 0:42 ` [PATCH 13/21] Hexagon (target/hexagon) Short-circuit packet HVX writes Taylor Simpson
2023-04-27 10:42 ` Richard Henderson
2023-04-26 0:42 ` [PATCH 14/21] Hexagon (target/hexagon) Short-circuit more HVX single instruction packets Taylor Simpson
2023-04-27 10:44 ` Richard Henderson [this message]
2023-04-26 0:42 ` [PATCH 15/21] Hexagon (target/hexagon) Add overrides for disabled idef-parser insns Taylor Simpson
2023-04-27 10:52 ` Richard Henderson
2023-04-26 0:42 ` [PATCH 16/21] Hexagon (target/hexagon) Make special new_value for USR Taylor Simpson
2023-04-27 10:57 ` Richard Henderson
2023-04-26 0:42 ` [PATCH 17/21] Hexagon (target/hexagon) Move new_value to DisasContext Taylor Simpson
2023-04-27 11:01 ` Richard Henderson
2023-04-27 11:03 ` Richard Henderson
2023-04-26 0:42 ` [PATCH 18/21] Hexagon (target/hexagon) Move new_pred_value " Taylor Simpson
2023-04-27 11:03 ` Richard Henderson
2023-04-26 0:42 ` [PATCH 19/21] Hexagon (target/hexagon) Move pred_written " Taylor Simpson
2023-04-27 11:05 ` Richard Henderson
2023-04-27 8:04 ` [PATCH 10/21] Hexagon (target/hexagon) Mark registers as read during packet analysis Richard Henderson
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