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From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: ysato@users.sourceforge.jp
Subject: Re: [Qemu-devel] [PATCH v16 21/23] target/rx: Emit all disassembly in one prt()
Date: Tue, 4 Jun 2019 07:36:34 +0200	[thread overview]
Message-ID: <48cf829e-3306-aed7-0623-498a4a4beb02@redhat.com> (raw)
In-Reply-To: <20190531134315.4109-22-richard.henderson@linaro.org>

On 5/31/19 3:43 PM, Richard Henderson wrote:
> Many of the multi-part prints have been eliminated by previous
> patches.  Eliminate the rest of them.
> 
> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/rx/disas.c | 75 ++++++++++++++++++++++++-----------------------
>  1 file changed, 39 insertions(+), 36 deletions(-)
> 
> diff --git a/target/rx/disas.c b/target/rx/disas.c
> index db10385fd0..ebc1a44249 100644
> --- a/target/rx/disas.c
> +++ b/target/rx/disas.c
> @@ -228,24 +228,21 @@ static bool trans_MOV_ra(DisasContext *ctx, arg_MOV_ra *a)
>  /* mov.[bwl] rs,rd */
>  static bool trans_MOV_mm(DisasContext *ctx, arg_MOV_mm *a)
>  {
> -    char dspd[8], dsps[8];
> +    char dspd[8], dsps[8], szc = size[a->sz];
>  
> -    prt("mov.%c\t", size[a->sz]);
>      if (a->lds == 3 && a->ldd == 3) {
>          /* mov.[bwl] rs,rd */
> -        prt("r%d, r%d", a->rs, a->rd);
> -        return true;
> -    }
> -    if (a->lds == 3) {
> +        prt("mov.%c\tr%d, r%d", szc, a->rs, a->rd);
> +    } else if (a->lds == 3) {
>          rx_index_addr(ctx, dspd, a->ldd, a->sz);
> -        prt("r%d, %s[r%d]", a->rs, dspd, a->rd);
> +        prt("mov.%c\tr%d, %s[r%d]", szc, a->rs, dspd, a->rd);
>      } else if (a->ldd == 3) {
>          rx_index_addr(ctx, dsps, a->lds, a->sz);
> -        prt("%s[r%d], r%d", dsps, a->rs, a->rd);
> +        prt("mov.%c\t%s[r%d], r%d", szc, dsps, a->rs, a->rd);
>      } else {
>          rx_index_addr(ctx, dsps, a->lds, a->sz);
>          rx_index_addr(ctx, dspd, a->ldd, a->sz);
> -        prt("%s[r%d], %s[r%d]", dsps, a->rs, dspd, a->rd);
> +        prt("mov.%c\t%s[r%d], %s[r%d]", szc, dsps, a->rs, dspd, a->rd);
>      }
>      return true;
>  }
> @@ -254,8 +251,11 @@ static bool trans_MOV_mm(DisasContext *ctx, arg_MOV_mm *a)
>  /* mov.[bwl] rs,[-rd] */
>  static bool trans_MOV_rp(DisasContext *ctx, arg_MOV_rp *a)
>  {
> -    prt("mov.%c\tr%d, ", size[a->sz], a->rs);
> -    prt((a->ad == 0) ? "[r%d+]" : "[-r%d]", a->rd);
> +    if (a->ad) {
> +        prt("mov.%c\tr%d, [-r%d]", size[a->sz], a->rs, a->rd);
> +    } else {
> +        prt("mov.%c\tr%d, [r%d+]", size[a->sz], a->rs, a->rd);
> +    }
>      return true;
>  }
>  
> @@ -263,9 +263,11 @@ static bool trans_MOV_rp(DisasContext *ctx, arg_MOV_rp *a)
>  /* mov.[bwl] [-rd],rs */
>  static bool trans_MOV_pr(DisasContext *ctx, arg_MOV_pr *a)
>  {
> -    prt("mov.%c\t", size[a->sz]);
> -    prt((a->ad == 0) ? "[r%d+]" : "[-r%d]", a->rd);
> -    prt(", r%d", a->rs);
> +    if (a->ad) {
> +        prt("mov.%c\t[-r%d], r%d", size[a->sz], a->rd, a->rs);
> +    } else {
> +        prt("mov.%c\t[r%d+], r%d", size[a->sz], a->rd, a->rs);
> +    }
>      return true;
>  }
>  
> @@ -299,9 +301,11 @@ static bool trans_MOVU_ar(DisasContext *ctx, arg_MOVU_ar *a)
>  /* movu.[bw] [-rs],rd */
>  static bool trans_MOVU_pr(DisasContext *ctx, arg_MOVU_pr *a)
>  {
> -    prt("movu.%c\t", size[a->sz]);
> -    prt((a->ad == 0) ? "[r%d+]" : "[-r%d]", a->rd);
> -    prt(", r%d", a->rs);
> +    if (a->ad) {
> +        prt("movu.%c\t[-r%d], r%d", size[a->sz], a->rd, a->rs);
> +    } else {
> +        prt("movu.%c\t[r%d+], r%d", size[a->sz], a->rd, a->rs);
> +    }
>      return true;
>  }
>  
> @@ -478,11 +482,11 @@ static bool trans_TST_mr(DisasContext *ctx, arg_TST_mr *a)
>  /* not rs, rd */
>  static bool trans_NOT_rr(DisasContext *ctx, arg_NOT_rr *a)
>  {
> -    prt("not\t");
>      if (a->rs != a->rd) {
> -        prt("r%d, ", a->rs);
> +        prt("not\tr%d, r%d", a->rs, a->rd);
> +    } else {
> +        prt("not\tr%d", a->rs);
>      }
> -    prt("r%d", a->rd);
>      return true;
>  }
>  
> @@ -490,11 +494,11 @@ static bool trans_NOT_rr(DisasContext *ctx, arg_NOT_rr *a)
>  /* neg rs, rd */
>  static bool trans_NEG_rr(DisasContext *ctx, arg_NEG_rr *a)
>  {
> -    prt("neg\t");
>      if (a->rs != a->rd) {
> -        prt("r%d, ", a->rs);
> +        prt("neg\tr%d, r%d", a->rs, a->rd);
> +    } else {
> +        prt("neg\tr%d", a->rs);
>      }
> -    prt("r%d", a->rd);
>      return true;
>  }
>  
> @@ -606,11 +610,10 @@ static bool trans_SBB_mr(DisasContext *ctx, arg_SBB_mr *a)
>  /* abs rs, rd */
>  static bool trans_ABS_rr(DisasContext *ctx, arg_ABS_rr *a)
>  {
> -    prt("abs\t");
> -    if (a->rs == a->rd) {
> -        prt("r%d", a->rd);
> +    if (a->rs != a->rd) {
> +        prt("abs\tr%d, r%d", a->rs, a->rd);
>      } else {
> -        prt("r%d, r%d", a->rs, a->rd);
> +        prt("abs\tr%d", a->rs);
>      }
>      return true;
>  }
> @@ -733,11 +736,11 @@ static bool trans_DIVU_mr(DisasContext *ctx, arg_DIVU_mr *a)
>  /* shll #imm:5, rs, rd */
>  static bool trans_SHLL_irr(DisasContext *ctx, arg_SHLL_irr *a)
>  {
> -    prt("shll\t#%d, ", a->imm);
>      if (a->rs2 != a->rd) {
> -        prt("r%d, ", a->rs2);
> +        prt("shll\t#%d, r%d, r%d", a->imm, a->rs2, a->rd);
> +    } else {
> +        prt("shll\t#%d, r%d", a->imm, a->rd);
>      }
> -    prt("r%d", a->rd);
>      return true;
>  }
>  
> @@ -752,11 +755,11 @@ static bool trans_SHLL_rr(DisasContext *ctx, arg_SHLL_rr *a)
>  /* shar #imm:5, rs, rd */
>  static bool trans_SHAR_irr(DisasContext *ctx, arg_SHAR_irr *a)
>  {
> -    prt("shar\t#%d,", a->imm);
>      if (a->rs2 != a->rd) {
> -        prt("r%d, ", a->rs2);
> +        prt("shar\t#%d, r%d, r%d", a->imm, a->rs2, a->rd);
> +    } else {
> +        prt("shar\t#%d, r%d", a->imm, a->rd);
>      }
> -    prt("r%d", a->rd);
>      return true;
>  }
>  
> @@ -771,11 +774,11 @@ static bool trans_SHAR_rr(DisasContext *ctx, arg_SHAR_rr *a)
>  /* shlr #imm:5, rs, rd */
>  static bool trans_SHLR_irr(DisasContext *ctx, arg_SHLR_irr *a)
>  {
> -    prt("shlr\t#%d, ", a->imm);
>      if (a->rs2 != a->rd) {
> -        prt("r%d, ", a->rs2);
> +        prt("shlr\t#%d, r%d, r%d", a->imm, a->rs2, a->rd);
> +    } else {
> +        prt("shlr\t#%d, r%d", a->imm, a->rd);
>      }
> -    prt("r%d", a->rd);
>      return true;
>  }
>  
> 

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>


  reply	other threads:[~2019-06-04  5:38 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-31 13:42 [Qemu-devel] [PATCH v16 00/23] Add RX architecture Richard Henderson
2019-05-31 13:42 ` [Qemu-devel] [PATCH v16 01/23] target/rx: TCG translation Richard Henderson
2019-05-31 13:42 ` [Qemu-devel] [PATCH v16 02/23] target/rx: TCG helper Richard Henderson
2019-05-31 13:42 ` [Qemu-devel] [PATCH v16 03/23] target/rx: CPU definition Richard Henderson
2019-05-31 13:42 ` [Qemu-devel] [PATCH v16 04/23] target/rx: RX disassembler Richard Henderson
2019-05-31 13:42 ` [Qemu-devel] [PATCH v16 05/23] hw/intc: RX62N interrupt controller (ICUa) Richard Henderson
2019-05-31 13:42 ` [Qemu-devel] [PATCH v16 06/23] hw/timer: RX62N internal timer modules Richard Henderson
2019-05-31 13:42 ` [Qemu-devel] [PATCH v16 07/23] hw/char: RX62N serial communication interface (SCI) Richard Henderson
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 08/23] hw/rx: RX Target hardware definition Richard Henderson
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 09/23] qemu/bitops.h: Add extract8 and extract16 Richard Henderson
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 10/23] hw/registerfields.h: Add 8bit and 16bit register macros Richard Henderson
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 11/23] target/rx: Convert to CPUClass::tlb_fill Richard Henderson
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 12/23] target/rx: Add RX to SysEmuTarget Richard Henderson
2019-06-04  5:32   ` Philippe Mathieu-Daudé
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 13/23] target/rx: Fix cpu types and names Richard Henderson
2019-05-31 14:23   ` Igor Mammedov
2019-05-31 14:59     ` Richard Henderson
2019-05-31 15:15       ` Igor Mammedov
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 14/23] tests: Add rx to machine-none-test.c Richard Henderson
2019-06-04  5:33   ` Philippe Mathieu-Daudé
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 15/23] hw/rx: Honor -accel qtest Richard Henderson
2019-06-04  5:34   ` Philippe Mathieu-Daudé
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 16/23] Add rx-softmmu Richard Henderson
2019-06-04  6:38   ` Philippe Mathieu-Daudé
2019-06-04 14:25     ` Richard Henderson
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 17/23] MAINTAINERS: Add RX Richard Henderson
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 18/23] target/rx: Disassemble rx_index_addr into a string Richard Henderson
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 19/23] target/rx: Replace operand with prt_ldmi in disassembler Richard Henderson
2019-06-04  5:37   ` Philippe Mathieu-Daudé
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 20/23] target/rx: Use prt_ldmi for XCHG_mr disassembly Richard Henderson
2019-06-04  5:38   ` Philippe Mathieu-Daudé
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 21/23] target/rx: Emit all disassembly in one prt() Richard Henderson
2019-06-04  5:36   ` Philippe Mathieu-Daudé [this message]
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 22/23] target/rx: Collect all bytes during disassembly Richard Henderson
2019-06-04  5:41   ` Philippe Mathieu-Daudé
2019-05-31 13:43 ` [Qemu-devel] [PATCH v16 23/23] target/rx: Dump bytes for each insn " Richard Henderson
2019-06-04  5:35   ` Philippe Mathieu-Daudé
2019-05-31 14:12 ` [Qemu-devel] [PATCH v16 00/23] Add RX architecture no-reply
2019-06-04  5:23 ` Philippe Mathieu-Daudé

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