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Subject: Re: [Qemu-devel] [Qemu-arm] [PATCH for-2.12] hw/intc/arm_gicv3: Fix
 secure-GIC NS ICC_PMR and ICC_RPR accesses
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To: Peter Maydell <peter.maydell@linaro.org>, Andrew Jones <drjones@redhat.com>
Cc: qemu-arm <qemu-arm@nongnu.org>, QEMU Developers <qemu-devel@nongnu.org>, "patches@linaro.org" <patches@linaro.org>

Hi Peter,

On 03/22/2018 03:29 PM, Peter Maydell wrote:
> On 22 March 2018 at 14:23, Andrew Jones <drjones@redhat.com> wrote:
>> On Thu, Mar 15, 2018 at 01:34:41PM +0000, Peter Maydell wrote:
>>> If the GIC has the security extension support enabled, then a
>>> non-secure access to ICC_PMR must take account of the non-secure
>>> view of interrupt priorities, where real priorities 0..0x7f
>>> are secure-only and not visible to the non-secure guest, and
>>> priorities 0x80..0xff are shown to the guest as if they were
>>> 0x00..0xff. We had the logic here wrong:
>>
>> 0x00..0x7f
> 
> I think 0x00..0xff is correct.

I guess Andrew only suggested to correct the hex prefix in your comment:
- ... where real priorities 0..0x7f
+ ... where real priorities 0x00..0x7f

> The conversion from actual
> priority value to the NS-view is
>    if (prio & 0x80 == 0) {
>        nsview = 0;
>    } else {
>        nsview = (prio << 1) & 0xff;
>    }
> 
> so:
>    real priority     NS view
>     0x80              0x00
>     0x90              0x20
>     0xa0              0x40
>     0xb0              0x60
>     0xc0              0x80
>     0xd0              0xa0
>     0xe0              0xc0
>     0xf0              0xe0
> 
> the NS view covers the whole 0x00..0xff range, but more sparsely.
> (OK, technically you can't ever read 0xff, only 0xfe.)