From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1L0OaK-0003pK-11 for qemu-devel@nongnu.org; Wed, 12 Nov 2008 17:53:16 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1L0OaI-0003oq-Sb for qemu-devel@nongnu.org; Wed, 12 Nov 2008 17:53:15 -0500 Received: from [199.232.76.173] (port=45268 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1L0OaI-0003od-LB for qemu-devel@nongnu.org; Wed, 12 Nov 2008 17:53:14 -0500 Received: from e2.ny.us.ibm.com ([32.97.182.142]:41435) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1L0OaI-0000jm-8f for qemu-devel@nongnu.org; Wed, 12 Nov 2008 17:53:14 -0500 Received: from d01relay02.pok.ibm.com (d01relay02.pok.ibm.com [9.56.227.234]) by e2.ny.us.ibm.com (8.13.1/8.13.1) with ESMTP id mACMr6c0000522 for ; Wed, 12 Nov 2008 17:53:06 -0500 Received: from d01av02.pok.ibm.com (d01av02.pok.ibm.com [9.56.224.216]) by d01relay02.pok.ibm.com (8.13.8/8.13.8/NCO v9.1) with ESMTP id mACMrDlf179596 for ; Wed, 12 Nov 2008 17:53:13 -0500 Received: from d01av02.pok.ibm.com (loopback [127.0.0.1]) by d01av02.pok.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id mACMqvGc004663 for ; Wed, 12 Nov 2008 17:52:58 -0500 Message-ID: <491B5E56.9010500@us.ibm.com> Date: Wed, 12 Nov 2008 16:53:10 -0600 From: Anthony Liguori MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH][RFC] Split non-TCG bits out of exec.c References: <1226527840-14183-1-git-send-email-aliguori@us.ibm.com> <491B5D33.7060601@bellard.org> In-Reply-To: <491B5D33.7060601@bellard.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Fabrice Bellard Cc: Carsten Otte , Paul Brook , qemu-devel@nongnu.org, kvm-devel , Hollis Blanchard Fabrice Bellard wrote: > I suggest to go even further: there should be a way in QEMU to define > CPUs which do not rely on the dynamic translator and this choice should > be doable at runtime (i.e. not with a bunch of #ifdefs as you may do > it). This way you could not only plug KVM CPUs without having the > equivalent TCG one, but also CPUs from other sources (i.e. the x86 > interpreter of malc, or the cycle accurate PTLsim x86 emulator). > Today, we do this with KVM support without any ifdefs (what's in SVN right now). We leave the TCG and the KVM state in CPUState, and then just use the appropriate cpu_exec() loop to run depending on the CPU type. We could go a step further and split out the core x86 CPU state from CPUX86State, and then introduce a CPUTCGState and CPUKVMState that both include CPUX86State but that seems like a lot of churn for little gain (KVM just adds two more fields to CPUX86State). What I'm trying to do with this patch, is make it possible to get rid of the TCG code altogether for targets that only support KVM and not TCG (ia64, s390, etc). How I'll eventually get rid of it is not with #ifdefs, but by just not compiling in all the TCG code, cpu-exec.c, exec.c and instead just compiling in a kvm-exec.c or something like that. Regards, Anthony Liguori > Fabrice. > >