From: Tomas Carnecky <tom@dbservice.com>
To: coreboot@coreboot.org, qemu-devel@nongnu.org
Subject: [Qemu-devel] IRQ problems under qemu
Date: Fri, 05 Dec 2008 09:35:21 +0100 [thread overview]
Message-ID: <4938E7C9.8090107@dbservice.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 994 bytes --]
When I tried to run coreboot under qemu, I was at first positively
surprised how well the things worked. The BIOS + linux kernel payload
booted in no time! But when I then tried to set up networking, I
couldn't get that to work. Somehow the linux kernel couldn't locate the
interrupts of the NIC. After some digging I found out that coreboot
doesn't provide ACPI tables and instead uses PCI IRQ table (I had to
extract this table from a running qemu system using the getpir utility
and then copy it to coreboot, if you want that patch, I can send that
too). Coreboot copies this table at runtime into memory at 0xf0000.
Apparently 0xf0000-0xfffff is part of the ISA BIOS, and qemu marks this
range as read-only.
The attached patch for qemu fixes that and also cleans up some of the
memory initialization. Instead of marking the ISA BIOS as read-only, it
copies that part from the BIOS image into the appropriate place (at
0xf0000-0xfffff) and leaves the memory as read-write.
tom
[-- Attachment #2: cleanup-bios-memory-mapping.patch --]
[-- Type: text/plain, Size: 4265 bytes --]
Index: hw/pc.c
===================================================================
--- hw/pc.c (revision 5846)
+++ hw/pc.c (working copy)
@@ -806,39 +806,29 @@
vmport_init();
- /* allocate RAM */
- ram_addr = qemu_ram_alloc(0xa0000);
+ /* allocate first MB of RAM */
+ ram_addr = qemu_ram_alloc(0x100000);
cpu_register_physical_memory(0, 0xa0000, ram_addr);
- /* Allocate, even though we won't register, so we don't break the
- * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
- * and some bios areas, which will be registered later
- */
- ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
- ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
- cpu_register_physical_memory(0x100000,
- below_4g_mem_size - 0x100000,
- ram_addr);
+ /* allocate all of the remaining RAM and register it with the CPU */
+ cpu_register_physical_memory(0x100000, below_4g_mem_size - 0x100000,
+ qemu_ram_alloc(below_4g_mem_size - 0x100000));
- /* above 4giga memory allocation */
if (above_4g_mem_size > 0) {
- ram_addr = qemu_ram_alloc(above_4g_mem_size);
- cpu_register_physical_memory(0x100000000ULL,
- above_4g_mem_size,
- ram_addr);
+ cpu_register_physical_memory(0x100000000ULL, above_4g_mem_size,
+ qemu_ram_alloc(above_4g_mem_size));
}
-
/* allocate VGA RAM */
vga_ram_addr = qemu_ram_alloc(vga_ram_size);
- /* BIOS load */
+ /* BIOS: load it to memory, copy the ISA BIOS into the last 128k
+ * of the first MB, map the whole BIOS at the top of memory */
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
bios_size = get_image_size(buf);
- if (bios_size <= 0 ||
- (bios_size % 65536) != 0) {
+ if (bios_size <= 0 || (bios_size % 65536) != 0) {
goto bios_error;
}
bios_offset = qemu_ram_alloc(bios_size);
@@ -849,7 +839,20 @@
exit(1);
}
- /* VGA BIOS load */
+ cpu_register_physical_memory((uint32_t)(-bios_size),
+ bios_size, bios_offset | IO_MEM_ROM);
+
+ isa_bios_size = bios_size;
+ if (isa_bios_size > (128 * 1024))
+ isa_bios_size = 128 * 1024;
+
+ memcpy(phys_ram_base + 0x100000 - isa_bios_size,
+ phys_ram_base + ram_addr + 0x100000 - isa_bios_size, isa_bios_size);
+ cpu_register_physical_memory(0x100000 - isa_bios_size, isa_bios_size,
+ ram_addr + 0x100000 - isa_bios_size);
+
+ /* VGA BIOS: load it directly into 0xc0000+0x10000,
+ * register the range with the CPU. */
if (cirrus_vga_enabled) {
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
} else {
@@ -858,27 +861,17 @@
vga_bios_size = get_image_size(buf);
if (vga_bios_size <= 0 || vga_bios_size > 65536)
goto vga_bios_error;
- vga_bios_offset = qemu_ram_alloc(65536);
- ret = load_image(buf, phys_ram_base + vga_bios_offset);
+ ret = load_image(buf, phys_ram_base + ram_addr + 0xc0000);
if (ret != vga_bios_size) {
vga_bios_error:
fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
exit(1);
}
- /* setup basic memory access */
cpu_register_physical_memory(0xc0000, 0x10000,
- vga_bios_offset | IO_MEM_ROM);
+ vga_bios_offset | IO_MEM_ROM);
- /* map the last 128KB of the BIOS in ISA space */
- isa_bios_size = bios_size;
- if (isa_bios_size > (128 * 1024))
- isa_bios_size = 128 * 1024;
- cpu_register_physical_memory(0x100000 - isa_bios_size,
- isa_bios_size,
- (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
-
{
ram_addr_t option_rom_offset;
int size, offset;
@@ -916,10 +909,6 @@
}
}
- /* map all the bios at the top of memory */
- cpu_register_physical_memory((uint32_t)(-bios_size),
- bios_size, bios_offset | IO_MEM_ROM);
-
bochs_bios_init();
cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
next reply other threads:[~2008-12-05 8:36 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-12-05 8:35 Tomas Carnecky [this message]
2008-12-05 18:59 ` [Qemu-devel] IRQ problems under qemu Carl-Daniel Hailfinger
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