From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LCagJ-0003OD-GJ for qemu-devel@nongnu.org; Tue, 16 Dec 2008 09:13:51 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LCagG-0003Mk-6I for qemu-devel@nongnu.org; Tue, 16 Dec 2008 09:13:50 -0500 Received: from [199.232.76.173] (port=48225 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LCagG-0003Me-0N for qemu-devel@nongnu.org; Tue, 16 Dec 2008 09:13:48 -0500 Received: from outbound-va3.frontbridge.com ([216.32.180.16]:13331 helo=VA3EHSOBE001.bigfish.com) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_ARCFOUR_MD5:16) (Exim 4.60) (envelope-from ) id 1LCagF-0005Te-Nh for qemu-devel@nongnu.org; Tue, 16 Dec 2008 09:13:47 -0500 Message-ID: <4947B7C5.7010608@amd.com> Date: Tue, 16 Dec 2008 15:14:29 +0100 From: Andre Przywara MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------020106000403050809040101" Subject: [Qemu-devel] [PATCH 2/8] v2: push NUMA topology to the BIOS Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori , Avi Kivity , qemu-devel@nongnu.org, osrc-patches@elbe.amd.com --------------020106000403050809040101 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Signed-off-by: Andre Przywara -- Andre Przywara AMD-Operating System Research Center (OSRC), Dresden, Germany Tel: +49 351 277-84917 ----to satisfy European Law for business letters: AMD Saxony Limited Liability Company & Co. KG, Wilschdorfer Landstr. 101, 01109 Dresden, Germany Register Court Dresden: HRA 4896, General Partner authorized to represent: AMD Saxony LLC (Wilmington, Delaware, US) General Manager of AMD Saxony LLC: Dr. Hans-R. Deppe, Thomas McCoy --------------020106000403050809040101 Content-Type: text/x-patch; name="qemunuma_v2_fwcfg.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="qemunuma_v2_fwcfg.patch" # HG changeset patch # User Andre Przywara # Date 1229430504 -3600 # Node ID a0a2e3026d4acffdce91b776d8c2d733767693c5 # Parent 6690ab0a34fdedaebbfe1068dfe7351734e8a1d7 push NUMA topology info to the BIOS diff -r 6690ab0a34fd -r a0a2e3026d4a hw/fw_cfg.h --- a/hw/fw_cfg.h Tue Dec 16 12:13:10 2008 +0100 +++ b/hw/fw_cfg.h Tue Dec 16 13:28:24 2008 +0100 @@ -8,6 +8,9 @@ #define FW_CFG_NOGRAPHIC 0x04 #define FW_CFG_NB_CPUS 0x05 #define FW_CFG_MACHINE_ID 0x06 +#define FW_CFG_NUMA_NODES 0x07 +#define FW_CFG_NUMA_NODE_CPUS 0x08 +#define FW_CFG_NUMA_NODE_MEM 0x09 #define FW_CFG_MAX_ENTRY 0x10 #define FW_CFG_WRITE_CHANNEL 0x4000 diff -r 6690ab0a34fd -r a0a2e3026d4a hw/pc.c --- a/hw/pc.c Tue Dec 16 12:13:10 2008 +0100 +++ b/hw/pc.c Tue Dec 16 13:28:24 2008 +0100 @@ -436,6 +436,12 @@ static void bochs_bios_init(void) fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0); fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1); fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); + fw_cfg_add_i16(fw_cfg, FW_CFG_NUMA_NODES, numnumanodes); + + fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA_NODE_MEM, (uint8_t*)node_mem, + sizeof(node_mem[0]) * numnumanodes); + fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA_NODE_CPUS, (uint8_t*)node_to_cpus, + sizeof(node_to_cpus[0]) * numnumanodes); } /* Generate an initial boot sector which sets state and jump to --------------020106000403050809040101--