From: Lawrence Hunter <lawrence.hunter@codethink.co.uk>
To: "Christoph Müllner" <christoph.muellner@vrull.eu>
Cc: qemu-devel@nongnu.org, dickon.hood@codethink.co.uk,
nazar.kazakov@codethink.co.uk, kiran.ostrolenk@codethink.co.uk,
frank.chang@sifive.com, palmer@dabbelt.com,
alistair.francis@wdc.com, bin.meng@windriver.com,
pbonzini@redhat.com, philipp.tomsich@vrull.eu,
kvm@vger.kernel.org
Subject: Re: [PATCH 02/45] target/riscv: Refactor some of the generic vector functionality
Date: Thu, 23 Mar 2023 11:34:09 +0000 [thread overview]
Message-ID: <494bdf70499cc02f4e03135e4eee45f6@codethink.co.uk> (raw)
In-Reply-To: <CAEg0e7j=yGrz6uSCZirthZB7FEF-BtB73e+D-UB_hXQTJEtmyw@mail.gmail.com>
On 21/03/2023 12:02, Christoph Müllner wrote:
> On Fri, Mar 10, 2023 at 5:06 PM Lawrence Hunter
> <lawrence.hunter@codethink.co.uk> wrote:
>>
>> From: Kiran Ostrolenk <kiran.ostrolenk@codethink.co.uk>
>>
>> Summary of refactoring:
>>
>> * take some functions/macros out of `vector_helper` and put them in a
>> new module called `vector_internals`
>>
>> * factor the non SEW-specific stuff out of `GEN_OPIVV_TRANS` into
>> function `opivv_trans` (similar to `opivi_trans`)
>
> I think splitting this commit into two changes would be better.
> Besides that the two changes look reasonable and correct.
Makes sense, we can do this
Best,
Lawrence
next prev parent reply other threads:[~2023-03-23 11:35 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-10 16:03 [PATCH 00/45] Add RISC-V vector cryptographic instruction set support Lawrence Hunter
2023-03-10 16:03 ` [PATCH 01/45] target/riscv: Add zvkb cpu property Lawrence Hunter
2023-03-10 16:03 ` [PATCH 02/45] target/riscv: Refactor some of the generic vector functionality Lawrence Hunter
2023-03-21 12:02 ` Christoph Müllner
2023-03-23 11:34 ` Lawrence Hunter [this message]
2023-03-10 16:03 ` [PATCH 03/45] target/riscv: Add vclmul.vv decoding, translation and execution support Lawrence Hunter
2023-03-10 16:03 ` [PATCH 04/45] target/riscv: Refactor some of the generic vector functionality Lawrence Hunter
2023-03-10 16:03 ` [PATCH 05/45] target/riscv: Add vclmul.vx decoding, translation and execution support Lawrence Hunter
2023-03-10 16:03 ` [PATCH 06/45] target/riscv: Add vclmulh.vv " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 07/45] target/riscv: Add vclmulh.vx " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 08/45] target/riscv: Refactor some of the generic vector functionality Lawrence Hunter
2023-03-10 16:03 ` [PATCH 09/45] qemu/bitops.h: Limit rotate amounts Lawrence Hunter
2023-03-10 16:03 ` [PATCH 10/45] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi] decoding, translation and execution support Lawrence Hunter
2023-03-10 16:03 ` [PATCH 11/45] target/riscv: Refactor some of the generic vector functionality Lawrence Hunter
2023-03-10 16:03 ` [PATCH 12/45] target/riscv: Add vbrev8.v decoding, translation and execution support Lawrence Hunter
2023-03-10 16:03 ` [PATCH 13/45] target/riscv: Add vrev8.v " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 14/45] target/riscv: Add vandn.[vv, vx] " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 15/45] target/riscv: Expose zvkb cpu property Lawrence Hunter
2023-03-10 16:03 ` [PATCH 16/45] target/riscv: Add zvkned " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 17/45] target/riscv: Add vaesef.vv decoding, translation and execution support Lawrence Hunter
2023-03-10 16:03 ` [PATCH 18/45] target/riscv: Add vaesef.vs " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 19/45] target/riscv: Add vaesdf.vv " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 20/45] target/riscv: Add vaesdf.vs " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 21/45] target/riscv: Add vaesdm.vv " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 22/45] target/riscv: Add vaesdm.vs " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 23/45] target/riscv: Add vaesz.vs " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 24/45] target/riscv: Add vaesem.vv " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 25/45] target/riscv: Add vaesem.vs " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 26/45] target/riscv: Add vaeskf1.vi " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 27/45] target/riscv: Add vaeskf2.vi " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 28/45] target/riscv: Expose zvkned cpu property Lawrence Hunter
2023-03-10 16:03 ` [PATCH 29/45] target/riscv: Add zvknh cpu properties Lawrence Hunter
2023-03-10 16:03 ` [PATCH 30/45] target/riscv: Add vsha2ms.vv decoding, translation and execution support Lawrence Hunter
2023-03-10 16:03 ` [PATCH 31/45] target/riscv: Add vsha2c[hl].vv " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 32/45] target/riscv: Expose zvknh cpu properties Lawrence Hunter
2023-03-10 16:03 ` [PATCH 33/45] target/riscv: Add zvksh cpu property Lawrence Hunter
2023-03-10 16:03 ` [PATCH 34/45] target/riscv: Add vsm3me.vv decoding, translation and execution support Lawrence Hunter
2023-03-10 16:03 ` [PATCH 35/45] target/riscv: Add vsm3c.vi " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 36/45] target/riscv: Expose zvksh cpu property Lawrence Hunter
2023-03-10 16:03 ` [PATCH 37/45] target/riscv: Add zvkg " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 38/45] target/riscv: Add vgmul.vv decoding, translation and execution support Lawrence Hunter
2023-03-10 16:03 ` [PATCH 39/45] target/riscv: Add vghsh.vv " Lawrence Hunter
2023-03-10 16:03 ` [PATCH 40/45] target/riscv: Expose zvkg cpu property Lawrence Hunter
2023-03-10 16:03 ` [PATCH 41/45] crypto: Create sm4_subword Lawrence Hunter
2023-03-10 16:03 ` [PATCH 42/45] crypto: Add SM4 constant parameter CK Lawrence Hunter
2023-03-10 16:03 ` [PATCH 43/45] target/riscv: Add zvksed cfg property Lawrence Hunter
2023-03-10 16:03 ` [PATCH 44/45] target/riscv: Add Zvksed support Lawrence Hunter
2023-03-10 16:03 ` [PATCH 45/45] target/riscv: Expose Zvksed property Lawrence Hunter
2023-03-23 12:51 ` [PATCH 00/45] Add RISC-V vector cryptographic instruction set support Daniel Henrique Barboza
-- strict thread matches above, loose matches on Subject: below --
2023-03-10 9:11 Lawrence Hunter
2023-03-10 9:11 ` [PATCH 02/45] target/riscv: Refactor some of the generic vector functionality Lawrence Hunter
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