From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LLwQs-0006cA-PH for qemu-devel@nongnu.org; Sun, 11 Jan 2009 04:16:34 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LLwQr-0006aR-5f for qemu-devel@nongnu.org; Sun, 11 Jan 2009 04:16:34 -0500 Received: from [199.232.76.173] (port=45481 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LLwQq-0006aF-TD for qemu-devel@nongnu.org; Sun, 11 Jan 2009 04:16:33 -0500 Received: from vsmtp04.dti.ne.jp ([202.216.231.139]:61986) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LLwQq-00066c-5n for qemu-devel@nongnu.org; Sun, 11 Jan 2009 04:16:32 -0500 Received: from [192.168.1.21] (PPPa1787.e11.eacc.dti.ne.jp [124.255.93.17]) by vsmtp04.dti.ne.jp (3.11v) with ESMTP AUTH id n0B9GUS7011301 for ; Sun, 11 Jan 2009 18:16:30 +0900 (JST) Message-ID: <4969B8F0.4020104@juno.dti.ne.jp> Date: Sun, 11 Jan 2009 18:16:32 +0900 From: Shin-ichiro KAWASAKI MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-2022-JP Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH 3/3] sh: SCI improvements Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org SE7750 uses SCI := Serial Communication Interface for one of consoles. This patch completes the SCI implementation, and makes SCI available for a console. # Tabs and spaces are mixed in "hw/sh_serial.c" so much. # Some clean up might be useful. Signed-off-by: Shin-ichiro KAWASAKI Index: trunk/hw/sh_serial.c =================================================================== --- trunk/hw/sh_serial.c (revision 6133) +++ trunk/hw/sh_serial.c (working copy) @@ -96,7 +96,7 @@ s->scr = val & ((s->feat & SH_SERIAL_FEAT_SCIF) ? 0xfa : 0xff); if (!(val & (1 << 5))) s->flags |= SH_SERIAL_FLAG_TEND; - if ((s->feat & SH_SERIAL_FEAT_SCIF) && s->txi) { + if (s->txi) { qemu_set_irq(s->txi, val & (1 << 7)); } if (!(val & (1 << 6))) { @@ -109,13 +109,15 @@ qemu_chr_write(s->chr, &ch, 1); } s->dr = val; - s->flags &= ~SH_SERIAL_FLAG_TDE; + if (s->feat & SH_SERIAL_FEAT_SCIF) + s->flags &= ~SH_SERIAL_FLAG_TDE; + else + s->flags |= SH_SERIAL_FLAG_TDE; return; -#if 0 case 0x14: /* FRDR / RDR */ - ret = 0; + /* do nothing */ + return; break; -#endif } if (s->feat & SH_SERIAL_FEAT_SCIF) { switch(offs) { @@ -165,17 +167,33 @@ case 0x24: /* LSR */ return; } - } - else { + } else { /* SCI */ switch(offs) { -#if 0 - case 0x0c: - ret = s->dr; - break; - case 0x10: - ret = 0; - break; -#endif + case 0x0c: /* TDR */ + if (s->chr) { + ch = val; + qemu_chr_write(s->chr, &ch, 1); + } + s->dr = val; + s->flags |= SH_SERIAL_FLAG_TDE | SH_SERIAL_FLAG_TEND; + if (s->scr & (1 << 7) && s->txi) { + qemu_set_irq(s->txi, 1); + } + return; + case 0x10: /* SSR */ + /* + * Ignore TDRE (1 << 7) bit because TDR is always + * writable in this SCI emulation. + */ + if (!(val & (1 << 6))) { + s->flags &= ~SH_SERIAL_FLAG_RDF; + } + if (!(val & (1 << 6))) { + if (s->rxi) { + qemu_set_irq(s->rxi, 0); + } + } + return; case 0x1c: s->sptr = val & 0x8f; return; @@ -191,30 +209,19 @@ sh_serial_state *s = opaque; uint32_t ret = ~0; -#if 0 switch(offs) { - case 0x00: + case 0x00: /* SMR */ ret = s->smr; break; - case 0x04: + case 0x04: /* BRR */ ret = s->brr; break; - case 0x08: + case 0x08: /* SCR */ ret = s->scr; break; - case 0x14: - ret = 0; - break; } -#endif if (s->feat & SH_SERIAL_FEAT_SCIF) { switch(offs) { - case 0x00: /* SMR */ - ret = s->smr; - break; - case 0x08: /* SCR */ - ret = s->scr; - break; case 0x10: /* FSR */ ret = 0; if (s->flags & SH_SERIAL_FLAG_TEND) @@ -242,11 +249,9 @@ s->flags &= ~SH_SERIAL_FLAG_RDF; } break; -#if 0 case 0x18: ret = s->fcr; break; -#endif case 0x1c: ret = s->rx_cnt; break; @@ -257,21 +262,26 @@ ret = 0; break; } - } - else { + } else { switch(offs) { -#if 0 - case 0x0c: + case 0x0c: /* TDR */ ret = s->dr; break; - case 0x10: + case 0x10: /* SSR */ ret = 0; + if (s->flags & SH_SERIAL_FLAG_TDE) + ret |= (1 << 7); + if (s->flags & SH_SERIAL_FLAG_RDF) + ret |= (1 << 6); + if (s->flags & SH_SERIAL_FLAG_TEND) + ret |= (1 << 2); + /* TODO : handle bit MPBT */ break; - case 0x14: + case 0x14: /* RDR */ ret = s->rx_fifo[0]; + s->flags &= ~SH_SERIAL_FLAG_RDF; break; -#endif - case 0x1c: + case 0x1c: /* SPTR */ ret = s->sptr; break; } @@ -311,6 +321,10 @@ } } else { s->rx_fifo[0] = ch; + s->flags |= SH_SERIAL_FLAG_RDF; + if (s->scr & (1 << 6) && s->rxi) { + qemu_set_irq(s->rxi, 1); + } } }