* [Qemu-devel] Re: kvm: system reset does not work / slow cirrus-vga
2009-01-17 12:13 [Qemu-devel] kvm: system reset does not work / slow cirrus-vga Jan Kiszka
@ 2009-01-17 12:37 ` Jan Kiszka
2009-01-18 8:34 ` Avi Kivity
0 siblings, 1 reply; 3+ messages in thread
From: Jan Kiszka @ 2009-01-17 12:37 UTC (permalink / raw)
To: qemu-devel; +Cc: Avi Kivity
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Jan Kiszka wrote:
> Another issue: cirrus_vga seems to run without mmio coalescing support.
> Graphic modes are horribly slow. In contrast, -vga std gives reasonable
> performance. Maybe I will play with the diff of the kvm tree later, but
> that one currently has its own cirrus-reset problems...
OK, this can be fixed by porting the kvm changes over, but I cannot
asses if they are all valid or needed upstream. Avi?
Jan
------>
diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index ef939ae..04295a0 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -850,11 +850,17 @@ static void cirrus_bitblt_cputovideo_next(CirrusVGAState * s)
static void cirrus_bitblt_reset(CirrusVGAState * s)
{
+ int need_update;
+
s->gr[0x31] &=
~(CIRRUS_BLT_START | CIRRUS_BLT_BUSY | CIRRUS_BLT_FIFOUSED);
+ need_update = s->cirrus_srcptr != &s->cirrus_bltbuf[0]
+ || s->cirrus_srcptr_end != &s->cirrus_bltbuf[0];
s->cirrus_srcptr = &s->cirrus_bltbuf[0];
s->cirrus_srcptr_end = &s->cirrus_bltbuf[0];
s->cirrus_srccounter = 0;
+ if (!need_update)
+ return;
cirrus_update_memory_access(s);
}
@@ -1381,6 +1387,8 @@ cirrus_hook_write_sr(CirrusVGAState * s, unsigned reg_index, int reg_value)
printf("cirrus: handled outport sr_index %02x, sr_value %02x\n",
reg_index, reg_value);
#endif
+ if (reg_index == 0x07)
+ cirrus_update_memory_access(s);
break;
case 0x17: // Configuration Readback and Extended Control
s->sr[reg_index] = (s->sr[reg_index] & 0x38) | (reg_value & 0xc7);
@@ -2620,12 +2628,12 @@ static CPUWriteMemoryFunc *cirrus_linear_bitblt_write[3] = {
static void map_linear_vram(CirrusVGAState *s)
{
+ vga_dirty_log_start((VGAState *)s);
if (!s->map_addr && s->lfb_addr && s->lfb_end) {
s->map_addr = s->lfb_addr;
s->map_end = s->lfb_end;
cpu_register_physical_memory(s->map_addr, s->map_end - s->map_addr, s->vram_offset);
- vga_dirty_log_start((VGAState *)s);
}
if (!s->map_addr)
@@ -2633,6 +2641,10 @@ static void map_linear_vram(CirrusVGAState *s)
s->lfb_vram_mapped = 0;
+ cpu_register_physical_memory(isa_mem_base + 0xa0000, 0x8000,
+ (s->vram_offset + s->cirrus_bank_base[0]) | IO_MEM_UNASSIGNED);
+ cpu_register_physical_memory(isa_mem_base + 0xa8000, 0x8000,
+ (s->vram_offset + s->cirrus_bank_base[1]) | IO_MEM_UNASSIGNED);
if (!(s->cirrus_srcptr != s->cirrus_srcptr_end)
&& !((s->sr[0x07] & 0x01) == 0)
&& !((s->gr[0x0B] & 0x14) == 0x14)
@@ -2644,24 +2656,24 @@ static void map_linear_vram(CirrusVGAState *s)
(s->vram_offset + s->cirrus_bank_base[1]) | IO_MEM_RAM);
s->lfb_vram_mapped = 1;
- vga_dirty_log_start((VGAState *)s);
}
else {
cpu_register_physical_memory(isa_mem_base + 0xa0000, 0x8000, s->vga_io_memory);
cpu_register_physical_memory(isa_mem_base + 0xa8000, 0x8000, s->vga_io_memory);
}
+ vga_dirty_log_start((VGAState *)s);
}
static void unmap_linear_vram(CirrusVGAState *s)
{
- if (s->map_addr && s->lfb_addr && s->lfb_end) {
- vga_dirty_log_stop((VGAState *)s);
+ vga_dirty_log_stop((VGAState *)s);
+ if (s->map_addr && s->lfb_addr && s->lfb_end)
s->map_addr = s->map_end = 0;
- }
cpu_register_physical_memory(isa_mem_base + 0xa0000, 0x20000,
s->vga_io_memory);
+ vga_dirty_log_start((VGAState *)s);
}
/* Compute the memory access functions */
@@ -3316,6 +3328,7 @@ static void cirrus_pci_lfb_map(PCIDevice *d, int region_num,
{
CirrusVGAState *s = &((PCICirrusVGAState *)d)->cirrus_vga;
+ vga_dirty_log_stop((VGAState *)s);
/* XXX: add byte swapping apertures */
cpu_register_physical_memory(addr, s->vram_size,
s->cirrus_linear_io_addr);
@@ -3328,6 +3341,7 @@ static void cirrus_pci_lfb_map(PCIDevice *d, int region_num,
/* account for overflow */
if (s->lfb_end < addr + VGA_RAM_SIZE)
s->lfb_end = addr + VGA_RAM_SIZE;
+ vga_dirty_log_start((VGAState *)s);
}
static void cirrus_pci_mmio_map(PCIDevice *d, int region_num,
@@ -3339,6 +3353,20 @@ static void cirrus_pci_mmio_map(PCIDevice *d, int region_num,
s->cirrus_mmio_io_addr);
}
+static void pci_cirrus_write_config(PCIDevice *d,
+ uint32_t address, uint32_t val, int len)
+{
+ PCICirrusVGAState *pvs = container_of(d, PCICirrusVGAState, dev);
+ CirrusVGAState *s = &pvs->cirrus_vga;
+
+ vga_dirty_log_stop((VGAState *)s);
+ pci_default_write_config(d, address, val, len);
+ if (s->map_addr && pvs->dev.io_regions[0].addr == -1)
+ s->map_addr = 0;
+ cirrus_update_memory_access(s);
+ vga_dirty_log_start((VGAState *)s);
+}
+
void pci_cirrus_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
ram_addr_t vga_ram_offset, int vga_ram_size)
{
@@ -3352,7 +3380,7 @@ void pci_cirrus_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
/* setup PCI configuration registers */
d = (PCICirrusVGAState *)pci_register_device(bus, "Cirrus VGA",
sizeof(PCICirrusVGAState),
- -1, NULL, NULL);
+ -1, NULL, pci_cirrus_write_config);
pci_conf = d->dev.config;
pci_conf[0x00] = (uint8_t) (PCI_VENDOR_CIRRUS & 0xff);
pci_conf[0x01] = (uint8_t) (PCI_VENDOR_CIRRUS >> 8);
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