From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LRXYJ-0002VB-4X for qemu-devel@nongnu.org; Mon, 26 Jan 2009 14:55:23 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LRXYI-0002Uz-Ni for qemu-devel@nongnu.org; Mon, 26 Jan 2009 14:55:22 -0500 Received: from [199.232.76.173] (port=50109 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LRXYI-0002Uw-Ds for qemu-devel@nongnu.org; Mon, 26 Jan 2009 14:55:22 -0500 Received: from e1.ny.us.ibm.com ([32.97.182.141]:48815) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LRXYH-0002ta-T9 for qemu-devel@nongnu.org; Mon, 26 Jan 2009 14:55:22 -0500 Received: from d01relay04.pok.ibm.com (d01relay04.pok.ibm.com [9.56.227.236]) by e1.ny.us.ibm.com (8.13.1/8.13.1) with ESMTP id n0QJrhrj012962 for ; Mon, 26 Jan 2009 14:53:43 -0500 Received: from d01av03.pok.ibm.com (d01av03.pok.ibm.com [9.56.224.217]) by d01relay04.pok.ibm.com (8.13.8/8.13.8/NCO v9.1) with ESMTP id n0QJtJma180438 for ; Mon, 26 Jan 2009 14:55:19 -0500 Received: from d01av03.pok.ibm.com (loopback [127.0.0.1]) by d01av03.pok.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id n0QJtJes028593 for ; Mon, 26 Jan 2009 14:55:19 -0500 Received: from squirrel.codemonkey.ws (sig-9-65-32-74.mts.ibm.com [9.65.32.74]) by d01av03.pok.ibm.com (8.12.11.20060308/8.12.11) with ESMTP id n0QJtIN6028549 for ; Mon, 26 Jan 2009 14:55:18 -0500 Message-ID: <497E1519.5060201@us.ibm.com> Date: Mon, 26 Jan 2009 13:55:05 -0600 From: Anthony Liguori MIME-Version: 1.0 Subject: Re: [Qemu-devel] [RESEND #?][PATCH 1/2] Log reset events References: <497DFE34.8050806@siemens.com> In-Reply-To: <497DFE34.8050806@siemens.com> Content-Type: text/plain; charset=ISO-8859-15; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Jan Kiszka wrote: > Original idea&code by Kevin Wolf, split-up in two patches and added more > archs. > > This patch introduces a flag to log CPU resets. Useful for tracing > unexpected resets (such as those triggered by x86 triple faults). > > Signed-off-by: Jan Kiszka > Acked-by: Kevin Wolf > Applied. Thanks. Regards, Anthony Liguori > --- > > cpu-all.h | 1 + > exec.c | 2 ++ > target-arm/helper.c | 6 ++++++ > target-cris/translate.c | 5 +++++ > target-i386/helper.c | 5 +++++ > target-m68k/helper.c | 5 +++++ > target-mips/translate.c | 5 +++++ > target-ppc/helper.c | 8 ++++++-- > target-sh4/translate.c | 5 +++++ > target-sparc/helper.c | 5 +++++ > 10 files changed, 45 insertions(+), 2 deletions(-) > > diff --git a/cpu-all.h b/cpu-all.h > index c8c5b98..3869bfd 100644 > --- a/cpu-all.h > +++ b/cpu-all.h > @@ -816,6 +816,7 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr); > #define CPU_LOG_PCALL (1 << 6) > #define CPU_LOG_IOPORT (1 << 7) > #define CPU_LOG_TB_CPU (1 << 8) > +#define CPU_LOG_RESET (1 << 9) > > /* define log items */ > typedef struct CPULogItem { > diff --git a/exec.c b/exec.c > index 56e5e48..302da34 100644 > --- a/exec.c > +++ b/exec.c > @@ -1569,6 +1569,8 @@ const CPULogItem cpu_log_items[] = { > #ifdef TARGET_I386 > { CPU_LOG_PCALL, "pcall", > "show protected mode far calls/returns/exceptions" }, > + { CPU_LOG_RESET, "cpu_reset", > + "show CPU state before CPU resets" }, > #endif > #ifdef DEBUG_IOPORT > { CPU_LOG_IOPORT, "ioport", > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 81663c8..26fd6d0 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -159,6 +159,12 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) > void cpu_reset(CPUARMState *env) > { > uint32_t id; > + > + if (qemu_loglevel_mask(CPU_LOG_RESET)) { > + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); > + log_cpu_state(env, 0); > + } > + > id = env->cp15.c0_cpuid; > memset(env, 0, offsetof(CPUARMState, breakpoints)); > if (id) > diff --git a/target-cris/translate.c b/target-cris/translate.c > index 2ff6fe2..b6b987a 100644 > --- a/target-cris/translate.c > +++ b/target-cris/translate.c > @@ -3458,6 +3458,11 @@ CPUCRISState *cpu_cris_init (const char *cpu_model) > > void cpu_reset (CPUCRISState *env) > { > + if (qemu_loglevel_mask(CPU_LOG_RESET)) { > + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); > + log_cpu_state(env, 0); > + } > + > memset(env, 0, offsetof(CPUCRISState, breakpoints)); > tlb_flush(env, 1); > > diff --git a/target-i386/helper.c b/target-i386/helper.c > index a28ab93..c2da767 100644 > --- a/target-i386/helper.c > +++ b/target-i386/helper.c > @@ -418,6 +418,11 @@ void cpu_reset(CPUX86State *env) > { > int i; > > + if (qemu_loglevel_mask(CPU_LOG_RESET)) { > + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); > + log_cpu_state(env, X86_DUMP_FPU | X86_DUMP_CCOP); > + } > + > memset(env, 0, offsetof(CPUX86State, breakpoints)); > > tlb_flush(env, 1); > diff --git a/target-m68k/helper.c b/target-m68k/helper.c > index ce56693..076ea35 100644 > --- a/target-m68k/helper.c > +++ b/target-m68k/helper.c > @@ -143,6 +143,11 @@ static int cpu_m68k_set_model(CPUM68KState *env, const char *name) > > void cpu_reset(CPUM68KState *env) > { > + if (qemu_loglevel_mask(CPU_LOG_RESET)) { > + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); > + log_cpu_state(env, 0); > + } > + > memset(env, 0, offsetof(CPUM68KState, breakpoints)); > #if !defined (CONFIG_USER_ONLY) > env->sr = 0x2700; > diff --git a/target-mips/translate.c b/target-mips/translate.c > index 692ea6d..b447b98 100644 > --- a/target-mips/translate.c > +++ b/target-mips/translate.c > @@ -8489,6 +8489,11 @@ CPUMIPSState *cpu_mips_init (const char *cpu_model) > > void cpu_reset (CPUMIPSState *env) > { > + if (qemu_loglevel_mask(CPU_LOG_RESET)) { > + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); > + log_cpu_state(env, 0); > + } > + > memset(env, 0, offsetof(CPUMIPSState, breakpoints)); > > tlb_flush(env, 1); > diff --git a/target-ppc/helper.c b/target-ppc/helper.c > index 2bf7650..3bd1d45 100644 > --- a/target-ppc/helper.c > +++ b/target-ppc/helper.c > @@ -2709,10 +2709,14 @@ void cpu_dump_rfi (target_ulong RA, target_ulong msr) > > void cpu_ppc_reset (void *opaque) > { > - CPUPPCState *env; > + CPUPPCState *env = opaque; > target_ulong msr; > > - env = opaque; > + if (qemu_loglevel_mask(CPU_LOG_RESET)) { > + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); > + log_cpu_state(env, 0); > + } > + > msr = (target_ulong)0; > if (0) { > /* XXX: find a suitable condition to enable the hypervisor mode */ > diff --git a/target-sh4/translate.c b/target-sh4/translate.c > index 9137e38..6c9dff5 100644 > --- a/target-sh4/translate.c > +++ b/target-sh4/translate.c > @@ -184,6 +184,11 @@ void cpu_dump_state(CPUState * env, FILE * f, > > static void cpu_sh4_reset(CPUSH4State * env) > { > + if (qemu_loglevel_mask(CPU_LOG_RESET)) { > + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); > + log_cpu_state(env, 0); > + } > + > #if defined(CONFIG_USER_ONLY) > env->sr = 0; > #else > diff --git a/target-sparc/helper.c b/target-sparc/helper.c > index d34b837..a275880 100644 > --- a/target-sparc/helper.c > +++ b/target-sparc/helper.c > @@ -639,6 +639,11 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) > > void cpu_reset(CPUSPARCState *env) > { > + if (qemu_loglevel_mask(CPU_LOG_RESET)) { > + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); > + log_cpu_state(env, 0); > + } > + > tlb_flush(env, 1); > env->cwp = 0; > env->wim = 1; > > > >