From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LRZYk-0004JI-86 for qemu-devel@nongnu.org; Mon, 26 Jan 2009 17:03:58 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LRZYi-0004I7-7o for qemu-devel@nongnu.org; Mon, 26 Jan 2009 17:03:57 -0500 Received: from [199.232.76.173] (port=37392 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LRZYh-0004Hu-VT for qemu-devel@nongnu.org; Mon, 26 Jan 2009 17:03:56 -0500 Received: from mail.gmx.net ([213.165.64.20]:45996) by monty-python.gnu.org with smtp (Exim 4.60) (envelope-from ) id 1LRZ4a-0007rZ-1z for qemu-devel@nongnu.org; Mon, 26 Jan 2009 16:32:49 -0500 Message-ID: <497E2BF8.5010304@gmx.net> Date: Mon, 26 Jan 2009 22:32:40 +0100 From: Carl-Daniel Hailfinger MIME-Version: 1.0 Subject: Re: [Qemu-devel] [6449] MTRR support on x86 (Carl-Daniel Hailfinger) References: In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Hi, thanks for committing this patch. It seems the chunk in target-i386/machine.c got lost and save/restore functionality is missing. Should I resend that part? Regards, Carl-Daniel On 26.01.2009 18:53, Anthony Liguori wrote: > Revision: 6449 > http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6449 > Author: aliguori > Date: 2009-01-26 17:53:04 +0000 (Mon, 26 Jan 2009) > > Log Message: > ----------- > MTRR support on x86 (Carl-Daniel Hailfinger) > > The current codebase ignores MTRR (Memory Type Range Register) > configuration writes and reads because Qemu does not implement caching. > All BIOS/firmware in know of for x86 do implement a mode called > Cache-as-RAM (CAR) which locks down the CPU cache lines and uses the CPU > cache like RAM before RAM is enabled. Qemu assumes RAM is accessible > from the start, but it would be nice to be able to run real > BIOS/firmware in Qemu. For that, we need CAR support and for CAR support > we have to support MTRRs. > > This patch is a first step in that direction. MTRRs are MSRs supported > by all recent x86 CPUs, even old i586. Besides influencing cache, the > MTRRs can be written and read back, so discarding MTRR writes violates > the expectations of existing code out there. > > An added benefit of this patch is that it fixes the following Linux > kernel error message present in recent kernels (provided the BIOS has > the recent MTRR patches applied): > ------------[ cut here ]------------ > WARNING: at arch/x86/kernel/cpu/mtrr/main.c:1500 mtrr_trim_uncached_memory+0x382/0x384() > WARNING: strange, CPU MTRRs all blank? > Modules linked in: > Supported: Yes > Pid: 0, comm: swapper Not tainted 2.6.27.7-9-default #1 > [] dump_trace+0x6b/0x249 > [] show_trace+0x20/0x39 > [] dump_stack+0x71/0x76 > [] warn_slowpath+0x6f/0x90 > [] mtrr_trim_uncached_memory+0x382/0x384 > [] setup_arch+0x40d/0x639 > [] start_kernel+0x6b/0x31f > ======================= > ---[ end trace 4eaa2a86a8e2da22 ]--- > > Handle common x86 MTRR reads and writes, but don't act on them. > > Signed-off-by: Carl-Daniel Hailfinger > Signed-off-by: Anthony Liguori > > Modified Paths: > -------------- > trunk/target-i386/cpu.h > trunk/target-i386/op_helper.c > -- http://www.hailfinger.org/