From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LRp4H-00074K-HK for qemu-devel@nongnu.org; Tue, 27 Jan 2009 09:37:33 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LRp4F-00072l-Jx for qemu-devel@nongnu.org; Tue, 27 Jan 2009 09:37:32 -0500 Received: from [199.232.76.173] (port=49529 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LRp4E-00072W-Ux for qemu-devel@nongnu.org; Tue, 27 Jan 2009 09:37:31 -0500 Received: from mail-qy0-f20.google.com ([209.85.221.20]:40954) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LRp4E-0000Ij-Aw for qemu-devel@nongnu.org; Tue, 27 Jan 2009 09:37:30 -0500 Received: by qyk13 with SMTP id 13so10475441qyk.10 for ; Tue, 27 Jan 2009 06:37:29 -0800 (PST) Message-ID: <497F1C1A.40700@codemonkey.ws> Date: Tue, 27 Jan 2009 08:37:14 -0600 From: Anthony Liguori MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor References: <1233059726-8566-1-git-send-email-agraf@suse.de> <1233059726-8566-2-git-send-email-agraf@suse.de> <1233059726-8566-3-git-send-email-agraf@suse.de> In-Reply-To: <1233059726-8566-3-git-send-email-agraf@suse.de> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Alexander Graf wrote: > As part of my ongoing effort to make nested SVM useful, I started working to get > VMware ESX run inside KVM. > > VMware couples itself pretty tightly to the CPUID, so it's a good idea to emulate > a machine that officially supports SVM and should thus exploit the powers of > nested virtualization. > > This patch adds a Phenom CPU identifier, that resembles a real-world phenom > CPU as closely as possible. > I didn't apply this last time because I dislike the idea of adding oodles of CPU definitions for x86. The proper thing to do here is to have an fdt based description of CPU model. That's not to say I won't apply this patch, but I don't like the idea of adding more and more of these things. Regards, Anthony Liguori > Signed-off-by: Alexander Graf > --- > target-i386/helper.c | 28 ++++++++++++++++++++++++++++ > 1 files changed, 28 insertions(+), 0 deletions(-) > > diff --git a/target-i386/helper.c b/target-i386/helper.c > index c2da767..636a02d 100644 > --- a/target-i386/helper.c > +++ b/target-i386/helper.c > @@ -137,6 +137,34 @@ static x86_def_t x86_defs[] = { > .model_id = "QEMU Virtual CPU version " QEMU_VERSION, > }, > { > + .name = "phenom", > + .level = 5, > + .vendor1 = CPUID_VENDOR_AMD_1, > + .vendor2 = CPUID_VENDOR_AMD_2, > + .vendor3 = CPUID_VENDOR_AMD_3, > + .family = 16, > + .model = 2, > + .stepping = 3, > + /* Missing: CPUID_VME, CPUID_HT */ > + .features = PPRO_FEATURES | > + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | > + CPUID_PSE36, > + /* Missing: CPUID_EXT_CX16, CPUID_EXT_POPCNT */ > + .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR, > + /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */ > + .ext2_features = (PPRO_FEATURES & 0x0183F3FF) | > + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX | > + CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT | > + CPUID_EXT2_FFXSR, > + /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC, > + CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A, > + CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH, > + CPUID_EXT3_OSVW, CPUID_EXT3_IBS */ > + .ext3_features = CPUID_EXT3_SVM, > + .xlevel = 0x8000001A, > + .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor" > + }, > + { > .name = "core2duo", > .level = 10, > .family = 6, >