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[109.42.113.203]) by smtp.gmail.com with ESMTPSA id t184-20020a1c46c1000000b003b4a699ce8esm28707536wma.6.2022.12.29.02.44.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 29 Dec 2022 02:44:31 -0800 (PST) Message-ID: <4980caa6-f86f-bafa-b0d2-d5fb43279272@redhat.com> Date: Thu, 29 Dec 2022 11:44:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 Subject: Re: [PATCH v3] hw/rtc/mc146818rtc: Make this rtc device target independent Content-Language: en-US To: Bernhard Beschow , Paolo Bonzini , qemu-devel@nongnu.org, Mark Cave-Ayland Cc: Michael S Tsirkin , =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , BALATON Zoltan References: <20221212075600.17408-1-thuth@redhat.com> <6D2F0907-4D76-4D06-9728-7F2D16A1873F@gmail.com> From: Thomas Huth In-Reply-To: <6D2F0907-4D76-4D06-9728-7F2D16A1873F@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.147, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 16/12/2022 15.26, Bernhard Beschow wrote: > > > Am 12. Dezember 2022 07:56:00 UTC schrieb Thomas Huth : >> The only reason for this code being target dependent is the apic-related >> code in rtc_policy_slew_deliver_irq(). Since these apic functions are rather >> simple, we can easily move them into a new, separate file (apic_irqcount.c) >> which will always be compiled and linked if either APIC or the mc146818 device >> are required. This way we can get rid of the #ifdef TARGET_I386 switches in >> mc146818rtc.c and declare it in the softmmu_ss instead of specific_ss, so >> that the code only gets compiled once for all targets. >> >> Reviewed-by: Philippe Mathieu-Daudé >> Reviewed-by: Mark Cave-Ayland >> Signed-off-by: Thomas Huth >> --- >> v3: Move TYPE_APIC_COMMON from apic_internal.h to apic.h and use it >> >> include/hw/i386/apic.h | 2 ++ >> include/hw/i386/apic_internal.h | 2 -- >> include/hw/rtc/mc146818rtc.h | 1 + >> hw/intc/apic_common.c | 27 ----------------- >> hw/intc/apic_irqcount.c | 53 +++++++++++++++++++++++++++++++++ >> hw/rtc/mc146818rtc.c | 25 +++++----------- >> hw/intc/meson.build | 6 +++- >> hw/rtc/meson.build | 3 +- >> 8 files changed, 69 insertions(+), 50 deletions(-) >> create mode 100644 hw/intc/apic_irqcount.c [...] >> diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c >> index 1ebb412479..d524dc02c2 100644 >> --- a/hw/rtc/mc146818rtc.c >> +++ b/hw/rtc/mc146818rtc.c >> @@ -43,11 +43,7 @@ >> #include "qapi/qapi-events-misc.h" >> #include "qapi/visitor.h" >> #include "hw/rtc/mc146818rtc_regs.h" >> - >> -#ifdef TARGET_I386 >> -#include "qapi/qapi-commands-misc-target.h" >> #include "hw/i386/apic.h" >> -#endif >> >> //#define DEBUG_CMOS >> //#define DEBUG_COALESCED >> @@ -112,7 +108,6 @@ static void rtc_coalesced_timer_update(RTCState *s) >> static QLIST_HEAD(, RTCState) rtc_devices = >> QLIST_HEAD_INITIALIZER(rtc_devices); >> >> -#ifdef TARGET_I386 >> void qmp_rtc_reset_reinjection(Error **errp) >> { >> RTCState *s; >> @@ -145,13 +140,6 @@ static void rtc_coalesced_timer(void *opaque) >> >> rtc_coalesced_timer_update(s); >> } >> -#else >> -static bool rtc_policy_slew_deliver_irq(RTCState *s) >> -{ >> - assert(0); >> - return false; >> -} >> -#endif >> >> static uint32_t rtc_periodic_clock_ticks(RTCState *s) >> { >> @@ -922,14 +910,15 @@ static void rtc_realizefn(DeviceState *dev, Error **errp) >> rtc_set_date_from_host(isadev); >> >> switch (s->lost_tick_policy) { >> -#ifdef TARGET_I386 >> - case LOST_TICK_POLICY_SLEW: >> - s->coalesced_timer = >> - timer_new_ns(rtc_clock, rtc_coalesced_timer, s); >> - break; >> -#endif >> case LOST_TICK_POLICY_DISCARD: >> break; >> + case LOST_TICK_POLICY_SLEW: >> + /* Slew tick policy is only available if the machine has an APIC */ >> + if (object_resolve_path_type("", TYPE_APIC_COMMON, NULL) != NULL) { > > This looks like an attempt to fish out x86 machines to preserve behavior. Does this also work for PIC-only x86 machines such as -M isapc? Drat, I think you might be right. Looks like the slew code might be usable via hw/i386/kvm/i8259.c on isapc, too... I guess I have to replace this with a more generic check for x86 instead... Thanks for pointing this out, I'll try to come up with a v4! Thomas