From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LmFbd-0001nU-1o for qemu-devel@nongnu.org; Tue, 24 Mar 2009 19:00:25 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LmFbY-0001jJ-5S for qemu-devel@nongnu.org; Tue, 24 Mar 2009 19:00:24 -0400 Received: from [199.232.76.173] (port=45269 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LmFbX-0001jB-Vf for qemu-devel@nongnu.org; Tue, 24 Mar 2009 19:00:20 -0400 Received: from pop-cowbird.atl.sa.earthlink.net ([207.69.195.68]:39055) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LmFbX-000579-K9 for qemu-devel@nongnu.org; Tue, 24 Mar 2009 19:00:19 -0400 Message-ID: <49C965FF.9040509@earthlink.net> Date: Tue, 24 Mar 2009 19:00:15 -0400 From: Robert Reif MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH 13/25] Add 21272 chipset (memory and pci controller for alpha) References: <1237909687-31711-1-git-send-email-gingold@adacore.com> <1237909687-31711-2-git-send-email-gingold@adacore.com> <1237909687-31711-3-git-send-email-gingold@adacore.com> <1237909687-31711-4-git-send-email-gingold@adacore.com> <1237909687-31711-5-git-send-email-gingold@adacore.com> <1237909687-31711-6-git-send-email-gingold@adacore.com> <1237909687-31711-7-git-send-email-gingold@adacore.com> <1237909687-31711-8-git-send-email-gingold@adacore.com> <1237909687-31711-9-git-send-email-gingold@adacore.com> <1237909687-31711-10-git-send-email-gingold@adacore.com> <1237909687-31711-11-git-send-email-gingold@adacore.com> <1237909687-31711-12-git-send-email-gingold@adacore.com> <1237909687-31711-13-git-send-email-gingold@adacore.com> <1237909687-31711-14-git-send-email-gingold@adacore.com> In-Reply-To: <1237909687-31711-14-git-send-email-gingold@adacore.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: gingold@adacore.com Tristan Gingold wrote: > Signed-off-by: Tristan Gingold > --- > hw/21272.c | 831 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > hw/pci.h | 8 + > 2 files changed, 839 insertions(+), 0 deletions(-) > create mode 100644 hw/21272.c > > diff --git a/hw/21272.c b/hw/21272.c > new file mode 100644 > index 0000000..267b682 > --- /dev/null > +++ b/hw/21272.c > @@ -0,0 +1,831 @@ > +/* > + * Qemu 21272 (Tsunami/Typhoon) chipset emulation. > + * > + * Copyright (c) 2009 AdaCore > + * > + * Written by Tristan Gingold. > + * > + * This work is licensed under the GNU GPL license version 2 or later. > + */ > +#include "hw.h" > +#include "devices.h" > +#include "pci.h" > + > +//#define DEBUG_CCHIP > +//#define DEBUG_PCHIP > +//#define DEBUG_DCHIP > +//#define DEBUG_PCICFG > + > +typedef struct PchipState PchipState; > +struct PchipState { > + /* IntAck handler. */ > + int (*iack_handler)(void *); > + void *iack_handler_param; > + > + PCIBus *pci; > + > + /* Pchip id. */ > + int num; > + > + /* Used to reconstruct 64bits accesses. Low long word first. */ > + uint32_t data; > + > + uint32_t wsba[3]; > + uint64_t wsba3; > + uint32_t wsm[3]; > + uint32_t wsm3; > + uint64_t tba[3]; > + uint64_t tba3; > + uint32_t perrmask; > + /* pctl */ > + unsigned char ptevrfy; > + unsigned char mwin; > + unsigned char hole; > + unsigned char chaindis; > +}; > + > +struct TyphoonState { > + qemu_irq *irqs; > + qemu_irq *intim_irq; > + CPUState *cpu[4]; > + > + /* Used to reconstruct 64bits accesses. Low long word first. */ > + uint32_t data; > + > + unsigned char misc_rev; > + unsigned char misc_abw; > + unsigned char misc_abt; > + > + int b_irq[4]; > + > + uint64_t dim[4]; > + uint64_t dir[4]; > + uint64_t drir; > + uint64_t aar[4]; > + > + /* dchip */ > + uint64_t csc; > + uint64_t str; > + > + PchipState pchip[2]; > +}; > + > + This looks like a perfect candidate for 64 bit I/O. http://lists.gnu.org/archive/html/qemu-devel/2009-03/msg00918.html