From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Lqofc-0004Ep-2B for qemu-devel@nongnu.org; Mon, 06 Apr 2009 09:15:24 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LqofW-0004DR-03 for qemu-devel@nongnu.org; Mon, 06 Apr 2009 09:15:22 -0400 Received: from [199.232.76.173] (port=39536 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LqofV-0004DO-TV for qemu-devel@nongnu.org; Mon, 06 Apr 2009 09:15:17 -0400 Received: from vsmtp01.dti.ne.jp ([202.216.231.136]:60877) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LqofV-0002vP-9Y for qemu-devel@nongnu.org; Mon, 06 Apr 2009 09:15:17 -0400 Received: from [192.168.1.22] (PPPa1996.e11.eacc.dti.ne.jp [124.255.93.226]) by vsmtp01.dti.ne.jp (3.11v) with ESMTP AUTH id n36DFCBS015281 for ; Mon, 6 Apr 2009 22:15:13 +0900 (JST) Message-ID: <49DA0064.2070909@juno.dti.ne.jp> Date: Mon, 06 Apr 2009 22:15:16 +0900 From: Shin-ichiro KAWASAKI MIME-Version: 1.0 Subject: Re: [Qemu-devel] SH: support 7785 serial References: <200904022129.02385.vladimir@codesourcery.com> In-Reply-To: <200904022129.02385.vladimir@codesourcery.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Hi, Vladimir. Thank you for your work. Vladimir Prus wrote: > These 3 patches make sh_serial.c support 7785 serial. The primary > difference is that on 7785, instead of single fifo count register > there are two separate ones -- for rx and tx. Patch 3 adds necessary > conditional logic. Patches 1 and 2 are cleanups that I've done alone > the way: > > - Patch 1 makes it possible to change the size of RX fifo. It's 16 > on 7751 and 64 on 7785. While I do not know of any breakage if we > use wrong size, it's still best to be correct. > - Patch 2 replaces a pile of hardcoded constants with macroses. > Also, the FSR register was handled strangely -- when written, we'd > look at the written value and set bits in the 'flags' field, and on > read, we'd reconstruct the value from the 'flags' field. There does > not seem to be any reason for such roundabout, so I've made the code > work with 'sr' directly. > > This patch was tested both with r2d, using kernel and userland found > at: > > thttp://www.assembla.com/wiki/show/qemu-sh4/BuildingEnvironment > > and with 7785, using a hand-made kernel. Patch 2 produces a trouble in my environment. For r2d, the output to SCIF from kernel is OK, but output from shell is broken by inserted white space, like follows. (before applying patch 2) # ls (after applying patch2) # l s Do you have time to investigate it? Regards, Shin-ichiro KAWASAKI