From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LrFAg-0006uE-NC for qemu-devel@nongnu.org; Tue, 07 Apr 2009 13:33:14 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LrFAb-0006rL-PO for qemu-devel@nongnu.org; Tue, 07 Apr 2009 13:33:14 -0400 Received: from [199.232.76.173] (port=42439 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LrFAb-0006r7-A8 for qemu-devel@nongnu.org; Tue, 07 Apr 2009 13:33:09 -0400 Received: from lizzard.sbs.de ([194.138.37.39]:19726) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LrFAa-0002sJ-M9 for qemu-devel@nongnu.org; Tue, 07 Apr 2009 13:33:09 -0400 Received: from mail2.sbs.de (localhost [127.0.0.1]) by lizzard.sbs.de (8.12.11.20060308/8.12.11) with ESMTP id n37HX3pA003142 for ; Tue, 7 Apr 2009 19:33:03 +0200 Received: from [139.25.109.167] (mchn012c.mchp.siemens.de [139.25.109.167] (may be forged)) by mail2.sbs.de (8.12.11.20060308/8.12.11) with ESMTP id n37HX2I4015669 for ; Tue, 7 Apr 2009 19:33:03 +0200 Message-ID: <49DB8E4E.8010904@siemens.com> Date: Tue, 07 Apr 2009 19:33:02 +0200 From: Jan Kiszka MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH] apic: Fix access to non-existent APIC Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel When running with -M isapc, there is no env->apic_state. Fix cpu_get/set_apic_* helpers to handle this corner case gracefully. Signed-off-by: Jan Kiszka --- hw/apic.c | 11 ++++++++--- 1 files changed, 8 insertions(+), 3 deletions(-) diff --git a/hw/apic.c b/hw/apic.c index 5a76498..d63d74b 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -280,6 +280,8 @@ void cpu_set_apic_base(CPUState *env, uint64_t val) #ifdef DEBUG_APIC printf("cpu_set_apic_base: %016" PRIx64 "\n", val); #endif + if (!s) + return; s->apicbase = (val & 0xfffff000) | (s->apicbase & (MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE)); /* if disabled, cannot be enabled again */ @@ -294,14 +296,17 @@ uint64_t cpu_get_apic_base(CPUState *env) { APICState *s = env->apic_state; #ifdef DEBUG_APIC - printf("cpu_get_apic_base: %016" PRIx64 "\n", (uint64_t)s->apicbase); + printf("cpu_get_apic_base: %016" PRIx64 "\n", + s ? (uint64_t)s->apicbase: 0); #endif - return s->apicbase; + return s ? s->apicbase : 0; } void cpu_set_apic_tpr(CPUX86State *env, uint8_t val) { APICState *s = env->apic_state; + if (!s) + return; s->tpr = (val & 0x0f) << 4; apic_update_irq(s); } @@ -309,7 +314,7 @@ void cpu_set_apic_tpr(CPUX86State *env, uint8_t val) uint8_t cpu_get_apic_tpr(CPUX86State *env) { APICState *s = env->apic_state; - return s->tpr >> 4; + return s ? s->tpr >> 4 : 0; } /* return -1 if no bit is set */