From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LsIhb-0006d0-Aj for qemu-devel@nongnu.org; Fri, 10 Apr 2009 11:31:35 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LsIha-0006cm-Q2 for qemu-devel@nongnu.org; Fri, 10 Apr 2009 11:31:34 -0400 Received: from [199.232.76.173] (port=39663 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LsIha-0006ch-Gv for qemu-devel@nongnu.org; Fri, 10 Apr 2009 11:31:34 -0400 Received: from hall.aurel32.net ([88.191.82.174]:40708) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LsIha-0007lZ-1w for qemu-devel@nongnu.org; Fri, 10 Apr 2009 11:31:34 -0400 Message-ID: <49DF664E.2080607@aurel32.net> Date: Fri, 10 Apr 2009 17:31:26 +0200 From: Aurelien Jarno MIME-Version: 1.0 Subject: Re: [Qemu-devel] [RFC][PATCH] tcg: allocate memory to spill registers on startup References: <20090410085406.GA15094@volta.aurel32.net> <200904101544.56081.paul@codesourcery.com> <20090410145609.GA20999@volta.aurel32.net> <200904101620.10589.paul@codesourcery.com> In-Reply-To: <200904101620.10589.paul@codesourcery.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 8bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paul Brook Cc: qemu-devel@nongnu.org Paul Brook a écrit : > On Friday 10 April 2009, Aurelien Jarno wrote: >> On Fri, Apr 10, 2009 at 03:44:55PM +0100, Paul Brook wrote: >>> On Friday 10 April 2009, Aurelien Jarno wrote: >>>> + assert(size != TCG_MAX_TEMPS * sizeof(tcg_target_long)); >>> Shouldn't this be >= ? >> When I wrote that, I thought that the two sizes have to match, > > In that case I think the assert is completely wrong. You're asserting that the > two values are not equal. IIRC there's bits in the TCG headers that disable > asserts by default - I've been bitten by this before. Correct. >> but you are right, the frame size can actually be bigger. >> Any other comment? > > What were you benchmarking? Translation speed or execution speed? > I'd guess that your new code speeds up the translator, but makes the resulting > code less cache friendly. Execution speed, that is compilation of a small software in qemu-system-mips64. I haven't try to do find which parts of QEMU goes faster, but I agree with your hypothesis. > Maybe if I see your subsequent optimization it might make more sense, though > I'm suspicious of tcg-target doing register allocation/spilling itself. I am trying to fix the following comment from Fabrice (tcg.c) /* XXX: for load/store we could do that only for the slow path (i.e. when a memory callback is called) */ The idea is not to do register allocation/spilling in tcg-target.c, but to save registers containing TCG globals to memory in the slow path only and without touching the TCGTemp structure. That's why it has to be done in tcg-target.c I currenty only have an hackish patch that does not fully work. I guess the best is to resent the current patch along with the slow path optimization one when it works. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net