From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LvYbU-00017E-0Y for qemu-devel@nongnu.org; Sun, 19 Apr 2009 11:06:44 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LvYbP-00016u-0T for qemu-devel@nongnu.org; Sun, 19 Apr 2009 11:06:43 -0400 Received: from [199.232.76.173] (port=47976 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LvYbO-00016n-Oy for qemu-devel@nongnu.org; Sun, 19 Apr 2009 11:06:38 -0400 Received: from fmmailgate02.web.de ([217.72.192.227]:42708) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LvYbO-0004Ax-1F for qemu-devel@nongnu.org; Sun, 19 Apr 2009 11:06:38 -0400 Message-ID: <49EB3DF5.6070601@web.de> Date: Sun, 19 Apr 2009 17:06:29 +0200 From: Jan Kiszka MIME-Version: 1.0 References: <1239616545-25199-1-git-send-email-gleb@redhat.com> <1239616545-25199-6-git-send-email-gleb@redhat.com> <49E99A7F.7000902@web.de> <20090418162820.GI27675@redhat.com> <20090419135745.GO10126@redhat.com> <49EB2FA1.2090305@web.de> In-Reply-To: <49EB2FA1.2090305@web.de> Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="------------enigA67085E90990E2CF1FFB6F97" Sender: jan.kiszka@web.de Subject: [Qemu-devel] Re: [PATCH 05/15] Coalesce userspace/kernel irqchip interrupt injection logic. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gleb Natapov Cc: kvm@vger.kernel.org, Dmitry Eremin-Solenikov , Joerg Roedel , qemu-devel , Alexander Graf , Avi Kivity This is an OpenPGP/MIME signed message (RFC 2440 and 3156) --------------enigA67085E90990E2CF1FFB6F97 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Jan Kiszka wrote: > Gleb Natapov wrote: >> On Sat, Apr 18, 2009 at 07:28:20PM +0300, Gleb Natapov wrote: >>>> So this patch may either expose a bug in the svm emulation of qemu o= r >>>> comes with a subtle regression that only triggers due to qemu's timi= ng. >>>> This needs to be understood. Gleb, any progress on reproducing it on= >>>> your side? >>>> >>> I reproduced it and I am debugging it. In my case the boot hangs on s= ti;hlt >>> sequence. Instrumentation thus far shows that at this point interrupt= s no longer >>> injected because ppr value is too big. Need to see why, but tpr handl= ing >>> is not complete in qemu svm. May be this is the reason. Will know mor= e >>> tomorrow. >>> >> I've looked into this and my conclusion is that if you are not going t= o >> develop SVM in qemu don't use it just yet. >=20 > We had a resource conflict regarding SVM capable AMD boxes and a tight > schedule, so we decided to pick qemu as initial development platform. > Turns out that this has was a bit too optimistic. :) >=20 >> QEMU doesn't handle exceptions >> during event injection properly. Actually it does not handle it at all= , >> so if PF happens during interrupt injection interrupt is lost and, wha= t >> worse, is never acked. If interrupt was high prio it blocks all other >> interrupts. >> >> The patch below adds exception handling during event injection. Valid >> flag removed from EVENTINJ only after successful injection and EVENTIN= J >> is copied to EXITINTINFO on exit. Can you give it a try? >=20 > Ah, great, thanks. Will test. I can confirm: patch below makes my kvm-in-qemu test case happy, too. Maybe you want to post this with changelog and signed-off to qemu-devel. Jan >> diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c >> index be09263..9264afd 100644 >> --- a/target-i386/op_helper.c >> +++ b/target-i386/op_helper.c >> @@ -1249,6 +1249,10 @@ void do_interrupt(int intno, int is_int, int er= ror_code, >> } else { >> do_interrupt_real(intno, is_int, error_code, next_eip); >> } >> + if (env->hflags & HF_SVMI_MASK) { >> + uint32_t event_inj =3D ldl_phys(env->vm_vmcb + offsetof(struct v= mcb, control.event_inj)); >> + stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj)= , event_inj & ~SVM_EVTINJ_VALID); >> + } >> } >> =20 >> /* This should come from sysemu.h - if we could include it here... */= >> @@ -4994,7 +4998,6 @@ void helper_vmrun(int aflag, int next_eip_addend= ) >> uint8_t vector =3D event_inj & SVM_EVTINJ_VEC_MASK; >> uint16_t valid_err =3D event_inj & SVM_EVTINJ_VALID_ERR; >> uint32_t event_inj_err =3D ldl_phys(env->vm_vmcb + offsetof(s= truct vmcb, control.event_inj_err)); >> - stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_i= nj), event_inj & ~SVM_EVTINJ_VALID); >> =20 >> qemu_log_mask(CPU_LOG_TB_IN_ASM, "Injecting(%#hx): ", valid_e= rr); >> /* FIXME: need to implement valid_err */ >> @@ -5331,6 +5334,8 @@ void helper_vmexit(uint32_t exit_code, uint64_t = exit_info_1) >> cpu_x86_set_cpl(env, 0); >> stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_code),= exit_code); >> stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_1= ), exit_info_1); >> + stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_int_in= fo), ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj))); >> + stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_int_in= fo_err), ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj_= err))); >> =20 >> env->hflags2 &=3D ~HF2_GIF_MASK; >> /* FIXME: Resets the current ASID register to zero (host ASID). *= / >> -- >> Gleb. --------------enigA67085E90990E2CF1FFB6F97 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.9 (GNU/Linux) Comment: Using GnuPG with SUSE - http://enigmail.mozdev.org iEYEARECAAYFAknrPfsACgkQniDOoMHTA+kJGACcDsbbSjids94My1cJnw3hDTy9 fRcAmQGel2foYyoyBInLHZVck0yrV1+8 =N1+L -----END PGP SIGNATURE----- --------------enigA67085E90990E2CF1FFB6F97--