From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LwDbn-0005l1-Tt for qemu-devel@nongnu.org; Tue, 21 Apr 2009 06:53:47 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LwDbj-0005kX-1x for qemu-devel@nongnu.org; Tue, 21 Apr 2009 06:53:47 -0400 Received: from [199.232.76.173] (port=39614 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LwDbi-0005kU-Q6 for qemu-devel@nongnu.org; Tue, 21 Apr 2009 06:53:42 -0400 Received: from outbound-dub.frontbridge.com ([213.199.154.16]:21341 helo=IE1EHSOBE003.bigfish.com) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_ARCFOUR_MD5:16) (Exim 4.60) (envelope-from ) id 1LwDbi-0003g7-Cq for qemu-devel@nongnu.org; Tue, 21 Apr 2009 06:53:42 -0400 Message-ID: <49ED9F51.3030707@amd.com> Date: Tue, 21 Apr 2009 12:26:25 +0200 From: Andre Przywara MIME-Version: 1.0 References: <1239202215-9206-1-git-send-email-andre.przywara@amd.com> <49E8938E.90007@us.ibm.com> In-Reply-To: <49E8938E.90007@us.ibm.com> Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [PATCH 0/4] v2: add NUMA emulation List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: qemu-devel@nongnu.org Anthony Liguori wrote: > Hi Andre, > > I don't understand why it's so difficult to eliminate the 64 CPU limit. Because bitmap operations are not trivial to be done right (look at Linux' implementation). I will send a patch later (introducing generic bitmap operations), but I didn't want to merge this with the NUMA patchset. > I'm willing to take these patches with the limit but I'd like to see the > following: > > The -numa stuff needs to be more defensive when -smp > 64. > Specificially, it needs to explicitly check and warn the user if a NUMA > node contains a CPU > 64. OK, done. > > Each patch needs some description of what it's doing. All patches need > a SoB. Agreed. But git should have already added a SoB line for every patch, no? Regards, Andre. -- Andre Przywara AMD-Operating System Research Center (OSRC), Dresden, Germany Tel: +49 351 448 3567 12 ----to satisfy European Law for business letters: Advanced Micro Devices GmbH Karl-Hammerschmidt-Str. 34, 85609 Dornach b. Muenchen Geschaeftsfuehrer: Jochen Polster; Thomas M. McCoy; Giuliano Meroni Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632