From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43)
	id 1M0KeV-0002ZY-NX
	for qemu-devel@nongnu.org; Sat, 02 May 2009 15:13:35 -0400
Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43)
	id 1M0KeR-0002VY-A5
	for qemu-devel@nongnu.org; Sat, 02 May 2009 15:13:35 -0400
Received: from [199.232.76.173] (port=43314 helo=monty-python.gnu.org)
	by lists.gnu.org with esmtp (Exim 4.43) id 1M0KeR-0002VQ-1T
	for qemu-devel@nongnu.org; Sat, 02 May 2009 15:13:31 -0400
Received: from mx2.redhat.com ([66.187.237.31]:48384)
	by monty-python.gnu.org with esmtp (Exim 4.60)
	(envelope-from <avi@redhat.com>) id 1M0KeQ-0003Mk-J1
	for qemu-devel@nongnu.org; Sat, 02 May 2009 15:13:30 -0400
Message-ID: <49FC9B39.4080408@redhat.com>
Date: Sat, 02 May 2009 22:12:57 +0300
From: Avi Kivity <avi@redhat.com>
MIME-Version: 1.0
Subject: Re: [Qemu-devel] Re: [PATCH  0/8] kvm: Fixes,
	cleanups and live	migration
References: <20090501211717.24514.23246.stgit@mchn012c.ww002.siemens.net>
	<49FB7A40.1020005@us.ibm.com> <20090502074041.GB7198@redhat.com>
	<49FC4F90.1030901@codemonkey.ws>
	<20090502172308.GA13933@redhat.com>
In-Reply-To: <20090502172308.GA13933@redhat.com>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Content-Transfer-Encoding: 7bit
List-Id: qemu-devel.nongnu.org
List-Unsubscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.gnu.org/pipermail/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Gleb Natapov <gleb@redhat.com>
Cc: Anthony Liguori <aliguori@us.ibm.com>, Jan Kiszka <jan.kiszka@web.de>, qemu-devel@nongnu.org

Gleb Natapov wrote:
>>
>> I think the right thing to do with this is introduce a kvm-cpu savevm  
>> that stores this information since it isn't relevant to TCG.  I think  
>> it's arguable whether you want instruction length there (can you get it  
>> reliably on SVM?).
>>
>>     
> We can't get it on SVM without instruction decoding, but it is not required
> on SVM. It is absolutely essential for soft interrupt/exception injection
> on VMX and has to be a part of migratable state.
>   

We need it in some neutral form so cross-vendor migration can work.

-- 
Do not meddle in the internals of kernels, for they are subtle and quick to panic.